Implementation and Analysis of Pulse Propagating Networks

脉冲传播网络的实现与分析

• 批准号: 09650081
• 负责人: HORIO Yoshihiko
• 金额: $ 2.11万
• 依托单位: Tokyo Denki University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 1997
• 资助国家: 日本
• 起止时间: 1997 至 1998
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-09650081/
• 关键词: Brain Modeling; Neural Networks; Real-Number Processing; Analog VLSI; Nonlinear Systems; Dynamical Systems; Neuron Model; Dynamical Cell Assembly; 時空間情報処理; アナログ情報処理

It is suggested, from the recent physiological and mathematical studies, that the sophisticated information processing in the brain, in particular in the cortex, is achieved by the neuron that sensitively responses to the fine time structure of asynchronously incoming excitatoly action potentials. The neuron functions as a coincident detector among spatio-temporal input pule trains. Continuous variables and time are important in the spatio-temporal network with coincident detector neurons, because real-number processing is possible with them. The real-number processing is very powerful but cannot be realized by the ordinary digital computer.In this research, the spatio-temporal processing network is implemented using analog integrated circuit technology where continuous time and variables such as voltage and current are available. First of all, an asynchronous pulse neuron model that is the core element of the asynchronous pulse propagating network is proposed. The response characteristics of the single neuron and neural network composed of numbers of neurons are investigated. As the results, chaotic responses are observed from single neuron, furthermore, dynamical assembly is organized in the network. The dynamical assembly is one candidate of the information coding in the spatio-temporal processing. Secondly, analog circuits for the model neuron, the synapse and the axon are proposed. The delay time of the propagating pulses in the axon circuits can be controlled continuously. Moreover, weight of the synaptic circuit can be altered digitally. Finally, the proposed circuits are fabricated using 1.2 mum CMOS semiconductor technology. Characteristics of the circuits are measured. As a consequence, chaotic responses are confirmed from the chip. Furthermore, pulse delay in the axon circuit is also observed. The possibility of the real-number processing using asynchronous pulse propagating network is shown through the IC implementation

最近的生理学和数学研究表明，大脑中复杂的信息处理，特别是皮层中的信息处理，是由神经元对异步传入的兴奋性动作电位的精细时间结构做出敏感反应来实现的。该神经元在时空输入脉冲序列之间起重合检测器的作用。连续变量和时间在具有一致检测器神经元的时空网络中非常重要，因为它们可以进行实数处理。实数处理功能强大，是普通数字计算机无法实现的。在本研究中，时空处理网络使用模拟集成电路技术实现，其中连续时间和电压、电流等变量可用。首先，提出了异步脉冲神经元模型，该模型是异步脉冲传播网络的核心要素。研究了单个神经元和多个神经元组成的神经网络的响应特性。结果表明，在单个神经元上观察到混沌响应，并在网络中组织了动态装配。动态装配是时空处理中信息编码的一种候选方法。其次，提出了模型神经元、突触和轴突的模拟电路。在轴突电路中传播脉冲的延迟时间可以连续控制。此外，突触回路的重量可以通过数字方式改变。最后，采用1.2 μ m CMOS半导体技术制作了所提出的电路。测量了电路的特性。因此，从芯片上确认了混沌响应。此外，还观察到轴突电路中的脉冲延迟。通过集成电路的实现，证明了异步脉冲传播网络实现实数处理的可能性

项目成果

M.Hanagata and Y.Horio: "A modified asynchronous pulse neural network model for VLSI implementation" Proc.Int.Symp.on Nonlinear Theory and Its Applications. 2. 849-852 (1997)

M.Hanagata 和 Y.Horio：“用于 VLSI 实现的改进的异步脉冲神经网络模型”Proc.Int.Symp.on 非线性理论及其应用。

K.Yasuda M.Hanagata R.Kasahara and Y.Horio: "Analog circuit implementation of asynchronous pulse neural network model" Proc.of Int Symp.on Nonlinear Theory and Its Applications. 2. 853-856 (1997)

K.Yasuda M.Hanagata R.Kasahara 和 Y.Horio：“异步脉冲神经网络模型的模拟电路实现”Proc.of Int Symp.on 非线性理论及其应用。

渡来賢一,堀尾喜彦: "連続時間遅延を持つ軸索回路の一構成法" 電子情報通信学会全国大会論文集. 1. 22 (1998)

Kenichi Watari、Yoshihiko Horio：“一种构建具有连续时间延迟的轴突电路的方法”IEICE 全国会议记录（1998 年）。

M.Hangata, Y.Horio and K.Aihara: "Asynchronous pulse neural network model for VLSI implementation" Tech.Rep.IEICE. NLP97-530. 29-35 (1998)

M.Hangata、Y.Horio 和 K.Aihara：“用于 VLSI 实现的异步脉冲神经网络模型”Tech.Rep.IEICE。

M.Hanagata and Y.Horio: "An asynchronous pulse neural network model with finite pulse width for VLSI implementation" Proc.Int.Conf.on Neural Information Processing and Intelligent Information Systems. 1. 26-29 (1997)

M.Hanagata 和 Y.Horio：“用于 VLSI 实现的具有有限脉冲宽度的异步脉冲神经网络模型”Proc.Int.Conf.on 神经信息处理和智能信息系统。