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SONATAS: Synthetic On-Chip and Off-Chip Optical Network System

SONATAS：综合片上和片外光网络系统

基本信息

批准号：
EP/L027070/1
负责人：
Georgios Zervas
金额：
$ 12.51万
依托单位：
University of Bristol
依托单位国家：
英国
项目类别：
Research Grant
财政年份：
2014
资助国家：
英国
起止时间：
2014 至无数据
项目状态：
已结题

来源：
https://gtr.ukri.org/projects?ref=EP%2FL027070%2F1
关键词：
SONATAS Synthetic Chip Off Optical

项目摘要

Optical network infrastructure has underpinned the Internet pervading everyone in some way and has stimulated relentless traffic growth. Current network infrastructure is made of stacked layers of function rigid systems. That includes optical switching nodes in conjunction with a set of transmission (i.e. 100Gbps and beyond) and transport (e.g. OTN) systems as well as Layer 2 switches, IP routers, to deliver end-to-end network infrastructure. Such networks are designed and optimised to deliver a fixed set of functionalities for the lifetime of their deployment. Recently there is a shift towards creating a more flexible control and transport by use of software defined network (SDN). SDN however introduces an inbuilt assumption that there is relatively dumb hardware for data switching and forwarding while having relatively intelligent software. This inherently restricts the flexibility of a network environment.The vision behind this project is to introduce and investigate a radically new and groundbreaking approach to accommodate future infrastructure needs in a more agile, flexible, programmable and evolvable manner down to the hardware level. This will be delivered by open programmable hardware eco-system (photonic and electronic) where the software/hardware programmable devices can be synthesized on-demand to support any and as many function(s) and layers and be re-purposed during their lifetime. Software/Hardware network functions can be interconnected electronically and/or optically to compose and synthesize a system on demand. This is an original and disruptive concept and proposal that defines the Synthetic Node and Network system. It is expected to deliver a breakthrough on Internet and beyond.The synthesis will consist of interconnection of electronic (e.g. FPGA processing blocks) and photonic (e.g. switching, elastic filtering, amplification, multicasting, etc.) function blocks to compose an fused on-chip off-chip system necessary to perform a particular function and deliver the associated network performance. Such approach eliminates the notion of dimensioning, deploying and provisioning applied on traditional networks designed with function rigid systems. The software-hardware function blocks can be also re-used on any future general-purpose programmable hardware (e.g FPGA/SoC) eliminating disruptive migration lifecycles. This also allows for network users (e.g. operators, service providers) to re-purpose the functions on their physical or virtual infrastructure on demand to suit the network service needs. This inherently redefines the system infrastructure and creates a new research field that fuses electronic and photonic programmability that opens up a new set of opportunities and challenges. The project will first investigate the formulation of function block behaviour realised both in electronics (i.e. data queuing, framing, protocols) and photonics (i.e. filtering, multiplexing, frequency/space switching). Such function blocks will be interconnected by an network topology (on-chip and off-chip) through the use of synthesis algorithms to compose a complete system. To deliver efficient synthesis, the composition framework and algorithms will consider infrastructure constraints (FPGA timing/space, and optical sub-system characteristics). Techniques will be devised and investigated to deliver isolation between distinct network programmable functions that co-exist on the same opto-electronic hardware substrate.The project provides direct contribution spanning across multiple EPSRC Priority Areas such as ICT networks and distributed systems as well as optical communications and micro-electronics design. Specifically it addresses the Towards an Intelligent Information Infrastructure (TI3) challenge. So it consequently fits with the EPSRC Working Together priority. It is this context that SONATAS is vital to the development of the future of information society.

光网络基础设施在某种程度上支撑了互联网的普及，并刺激了流量的持续增长。当前的网络基础设施是由多层堆叠的功能刚性系统构成的。这包括光交换节点与一组传输（即100Gbps及以上）和传输（例如OTN）系统以及第二层交换机、IP路由器相结合，以提供端到端网络基础设施。这种网络的设计和优化是为了在其部署的整个生命周期内提供一组固定的功能。最近有一种转变，即通过使用软件定义网络（SDN）来创建更灵活的控制和传输。然而，SDN引入了一个固有的假设，即在拥有相对智能的软件的同时，有相对愚蠢的硬件来进行数据交换和转发。这从本质上限制了网络环境的灵活性。这个项目背后的愿景是引入和研究一种全新的、突破性的方法，以更敏捷、灵活、可编程和可进化的方式适应未来的基础设施需求，一直到硬件层面。这将通过开放的可编程硬件生态系统（光子和电子）来实现，其中软件/硬件可编程设备可以按需合成，以支持任何和尽可能多的功能和层，并在其生命周期内重新利用。软件/硬件网络功能可以通过电子和/或光学方式相互连接，根据需要组成和合成一个系统。这是一个原创的、颠覆性的概念和建议，它定义了合成节点和网络系统。它有望在互联网和其他领域取得突破。该合成将包括电子（例如FPGA处理块）和光子（例如开关、弹性滤波、放大、多播等）功能块的互连，以组成一个融合的片上片外系统，以执行特定功能并提供相关的网络性能。这种方法消除了在使用功能严格系统设计的传统网络上应用的量纲化、部署和供应的概念。软件-硬件功能块也可以在任何未来的通用可编程硬件（例如FPGA/SoC）上重用，从而消除了破坏性的迁移生命周期。这也允许网络用户（如运营商、服务提供商）根据需要重新利用其物理或虚拟基础设施上的功能，以适应网络服务需求。这本质上重新定义了系统基础设施，并创造了一个新的研究领域，融合了电子和光子可编程性，开辟了一系列新的机遇和挑战。该项目将首先研究在电子学（即数据排队，帧，协议）和光子学（即滤波，多路复用，频率/空间切换）中实现的功能块行为的制定。这些功能块将通过使用合成算法通过网络拓扑（片内和片外）相互连接，以组成一个完整的系统。为了提供高效的合成，组合框架和算法将考虑基础设施限制（FPGA时序/空间和光学子系统特性）。技术将被设计和研究，以提供不同的网络可编程功能之间的隔离，共存于同一光电硬件基板。该项目为多个EPSRC优先领域提供直接贡献，如ICT网络和分布式系统以及光通信和微电子设计。具体来说，它解决了迈向智能信息基础设施（TI3）的挑战。因此，它符合EPSRC共同工作的优先事项。正是在这种背景下，奏鸣曲对未来信息社会的发展至关重要。