Perovskite X-ray Photon Counting Detector

Percent X射线光子计数探测器（PePAD）项目的重点是通过将高质量的钙钛矿（PVK）单晶直接生长到像素化专用集成电路（ASIC）阵列上来开发多像素化光子计数探测器（PCD），从而实现第一个基于像素化PVK的PCD。PePAD是一个雄心勃勃的项目，包括以下目标：目标1：在器件相关衬底上模块化和形状可控地生长PVK单晶，其光电性能可与传统的碲化镉（CdTe）或碲锌镉（CZT）半导体相媲美。WP 1将首先允许通过逆温结晶（ITC）方法制造PVK单晶。优化PVK单晶生长的杠杆将包括调整A位阳离子（FA，Cs和/或MA）的分数，以及晶体生长中的添加剂，包括EDTA，将受到主持小组最近工作的启发。目标2：制造并建立对具有自操作能力（在0 V施加偏压下），低暗电流，高能量分辨率和稳定操作的单像素PCD的强大基本理解。WP 2将允许优化设备架构及其组件。单像素PCD的一般结构将是Me/HTL/PVK单晶/ETL/Me或TCO。界面将被优化，以最好地解决在PVK和ETL或HTL的界面处出现的缺陷，包括使用2D/3D表面，LiF和/或MgF 2薄层，灵感来自PV作品。目标3：制造和演示高性能像素化PCD，具有低电荷共享和低像素间漏电流，在某些通量和高图像分辨率下没有脉冲堆积效应。WP 3将允许在ASIC阵列上直接展示已经在WP 1中优化的PVK单晶生长。WP 2中优化的电荷传输层和电极将沉积在PVK单晶上以完成多像素PCD。

Perovskite X-ray Photon Counting Detectors (PePAD) project focuses on the development of multi-pixelated photon counting detectors (PCDs) via growing high-quality perovskite (PVK) single crystals directly onto pixelated application-specific integrated circuit (ASIC) arrays, thus realising the first pixelated PVK-based PCDs. The PePAD is an ambitious project comprised of the following objectives.Objective 1: Modular and shape-controlled growth of PVK single crystals onto device-relevant substrates with optoelectronic properties rivalling to conventional Cadmium Telluride (CdTe) or Cadmium Zinc Telluride (CZT) semiconductors. WP1 will first allow fabricating PVK single crystals via inverse temperature crystallisation (ITC) method. The levers to optimise the PVK single crystals growth will include tuning fractions of A-site cations (FA, Cs and/or MA) and additives in the crystal growth including EDTA will be used inspired by the host group's recent work.Objective 2: Fabrication and build a strong fundamental understanding of single-pixel PCD with self-operating capability (at 0V applied bias), low dark current, high energy resolution and stable operation. WP2 will allow optimisation of device architecture and their components. The general structure of single-pixel PCD will be a Me/HTL/PVK single crystal/ETL/Me or TCO. Interfaces will be optimised to best address the defects arising at the interfaces of PVK and ETL or HTL, including use of 2D/3D surfaces, LiF and/or MgF2 thin layers inspired by PV works.Objective 3: Fabrication and demonstration of high-performance pixelated PCD with low charge sharing and low pixel-to-pixel leakage current, without pulse pileup effect at certain fluxes and high image resolution. WP3 will allow demonstration of PVK single crystal growth already optimised in WP1 directly on the ASIC arrays. The optimized charge transport layers and electrodes in WP2 will be deposited on the PVK single crystals to complete multi-pixel PCDs.