Virtualisation for FPGA Accelerators. Information and communication technologies: ICT Networks & Distributed Systems

FPGA 加速器虚拟化。

• 批准号: 1745803
• 金额: --
• 依托单位: University of Warwick
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2016
• 资助国家: 英国
• 起止时间: 2016 至 无数据
• 项目状态: 已结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-1745803
• 关键词: Virtualisation; FPGA; Accelerators.; Information; communication

EPSRC Remit: Information and communication technologies: ICT Networks & Distributed SystemsFPGAs have demonstrated use in a wide range of application domains, from embedded to data centre scale. One of their key strengths is the close coupling of communication and computation that offers alternative ways of thinking about system properties such as responsiveness and security. As energy efficiency becomes more important, and increasing connectivity is driven by scenarios such as the Internet of Things (IoT), we have an opportunity to re-evaluate methods for implementing computation on FPGAs that have traditionally been viewed as alternatives to other silicon technologies. Most FPGA systems today are designed as single point solutions. To embed FPGAs more effectively in networked systems, we must support methods for virtualising computation on them to allow more dynamic and adaptive use, and to enable them to be deployed in wider contexts, such as the cloud. This project explores ways of building abstractions on top of FPGAs to enable fast compilation, rapid deployment and adaptive reconfiguration in a range of networked contexts, with exploration of security and reliability in such systems. This builds on cutting edge research in overlay architectures, partial reconfiguration, smart network controllers and interface platforms.

EPSRC职责：信息和通信技术：ICT网络和分布式系统现场可编程门阵列已在从嵌入式到数据中心规模的广泛应用领域展示了用途。它们的主要优势之一是通信和计算的紧密耦合，这为考虑系统属性(如响应性和安全性)提供了另一种方式。随着能源效率变得越来越重要，以及物联网(IoT)等场景推动的连接性不断增加，我们有机会重新评估在传统上被视为其他硅技术替代方案的现场可编程门阵列上实现计算的方法。目前大多数的现场可编程门阵列系统都被设计成单点解决方案。为了将现场可编程门阵列更有效地嵌入到网络系统中，我们必须支持对其进行计算虚拟化的方法，以允许更动态和自适应的使用，并使其能够部署在更广泛的环境中，如云。该项目探索了在现场可编程门阵列上构建抽象的方法，以在一系列网络环境中实现快速编译、快速部署和自适应重新配置，并探索了此类系统的安全性和可靠性。这建立在覆盖架构、部分重新配置、智能网络控制器和接口平台方面的尖端研究基础上。

项目成果

Network Intrusion Detection Using Neural Networks on FPGA SoCs

• DOI: 10.1109/fpl.2019.00043
• 发表时间: 2019-09
• 期刊: 2019 29th International Conference on Field Programmable Logic and Applications (FPL)
• 作者: Lenos Ioannou;Suhaib A. Fahmy

Neural Network Overlay Using FPGA DSP Blocks

• DOI: 10.1109/fpl.2019.00048
• 发表时间: 2019-09
• 期刊: 2019 29th International Conference on Field Programmable Logic and Applications (FPL)
• 作者: Lenos Ioannou;Suhaib A. Fahmy

Lightweight Programmable DSP Block Overlay for Streaming Neural Network Acceleration

用于流式神经网络加速的轻量级可编程 DSP 块叠加

• DOI: 10.1109/icfpt47387.2019.00066
• 发表时间: 2019
• 作者: Ioannou L