Automated Processor Hardware Synthesis

自动处理器硬件综合

• 批准号: 2590776
• 金额: --
• 依托单位: University of Edinburgh
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2021
• 资助国家: 英国
• 起止时间: 2021 至 无数据
• 项目状态: 已结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-2590776
• 关键词: Automated; Processor; Hardware; Synthesis

Continuing the line of thought from previous work from my supervisorsand senior research group member, the overarching goal of thisresearch is to synthesize processor hardware, specifically hardware tointerface between a processor and complex memory system. This consistsof several sub-goals.These sub-goals are to determine the formal/mathematical specificationof the processor, it's details, and the processor's system detailsthat are required in order to have a software tool correctlysynthesize hardware units for processors.These sub-goals will also require the development of analysisprocedures, likely involving a combination of formal and heuristicanalyses for synthesizing correct and functional hardware, andpotentially optimizing the performance of the generated hardware.Additionally, the tool would need an appropriate internalrepresentation of the processor's hardware structures in order toperform analyses.The broader question this would work towards answering is if it ispossible or reasonable to synthesize hardware for a complex systemsuch as a processor. This would develop novel engineeringmethodologies and answer multiple sub-questions such as what is theappropriate input specification that is required to describe aprocessor in a way that is natural for processor designers to expressand explore different hardware designs. Another important sub-questionis how should this software tool represent the processor designinternally to allow it to verify the correctness and functionality ofthe design as well as optimize it. The novel methodology developed inanswering these questions is improving a processor designer's workflowby giving them the ability to quickly have this tool synthesizecorrect and optimal hardware of their intended design, rather thanmanually implement a potentially error prone design. Additionallyidentifying an appropriate formal specification of the processorsystem that allows processor designers to express hardware designswould be another novel contribution. Determining the appropriateanalyses and synthesis procedures a synthesis tool needs to perform isanother novel engineering methodology this would contribute towards.

延续了我的主管和高级研究小组成员之前的工作思路，这项研究的总体目标是合成处理器硬件，特别是处理器和复杂存储系统之间的硬件接口。这些子目标包括几个子目标。这些子目标是确定处理器的形式/数学规范、其细节和处理器的系统细节，以使软件工具正确地综合处理器的硬件单元。这些子目标还将需要开发分析程序，可能涉及用于综合正确和有效的硬件的形式分析和启发式分析的组合，并潜在地优化所生成的硬件的性能。此外，该工具将需要处理器硬件结构的适当的内部表示以进行形式分析。这将有助于回答更广泛的问题，即为处理器等复杂的硬件综合硬件是否可能或是否合理。这将开发新的工程方法，并回答多个子问题，例如需要什么适当的输入规范才能以处理器设计者自然地表达和探索不同硬件设计的方式描述处理器。另一个重要的子问题是，该软件工具应该如何在内部表示处理器设计，以使其能够验证设计的正确性和功能性并对其进行优化。在回答这些问题时开发的新方法正在改进处理器设计人员的工作流程，使他们能够快速使用该工具来综合校正和优化其预期设计的硬件，而不是手动实现潜在的容易出错的设计。此外，确定允许处理器设计者表达硬件设计的处理器系统的适当形式规范将是另一个新的贡献。确定合成工具需要执行的适当分析和合成程序是另一种新的工程方法，这将有助于实现这一点。