CSR: SMALL: Formal Models, Processor Architecture, and Evaluation of Sampling for Hardware Reliability

CSR：SMALL：形式模型、处理器架构和硬件可靠性采样评估

• 批准号: 1117782
• 负责人: Karthikeyan Sankaralingam
• 金额: $ 20万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-07-01 至 2014-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1117782&HistoricalAwards=false
• 关键词: CSR; SMALL; Formal; Models; Processor

Device physics, manufacturing, and engineering challenges in process scaling are providing signi?cant challenges in producing reliable transistors for future technologies. Many academic experts, industry consortia, and research panels have warned that future generations of silicon technology are likely to be much less reliable with multi-core chips with cores failing in the ?eld due to faults in silicon are around the corner. Concurrently with the reducing reliability, the individual energy ef?ciency of transistors is not keeping up with increase in transistor density. These two trends portend a perfect storm: as the energy ef?ciency of transistors is slowing down, they are becoming highly unpredictable which will force further inef?ciencies. Addressing hardware reliability is a fundamental problem for microprocessors and hence for sustaining the IT revolution. This project looks at mechanisms for allowing chips and the higher levels of software to continue working even when devices fail. The basic idea the project looks at is how to detect when chips fail.The core idea that this projrct builds upon is the principle of Sampling. Instead of checking for failures all the time, the idea is to use a periodic sampling window for checking for device failures. The project investigates formal models, hardware implementation, and evaluation to understand the effect of device failures and the impact of the detection techniques.

设备物理，制造和工艺缩放工程的挑战提供了重要的？在为未来技术生产可靠的晶体管方面，我们面临着巨大的挑战。许多学术专家、行业联盟和研究小组警告说，未来几代硅技术的可靠性可能会大大降低，因为多核芯片的核心会在？由于硅缺陷而导致的火灾即将发生。同时与可靠性降低，个别能源效益？晶体管的效率没有跟上晶体管密度的增加。这两个趋势预示着一个完美的风暴：作为能源ef？晶体管的速度正在放缓，它们变得非常不可预测，这将迫使进一步的inef？科学解决硬件可靠性是微处理器的一个基本问题，因此也是维持IT革命的一个基本问题。 该项目着眼于允许芯片和更高级别的软件在设备故障时继续工作的机制。该项目的基本思想是如何检测芯片何时失效。该项目建立的核心思想是采样原理。我们的想法是使用一个周期性的采样窗口来检查设备故障，而不是一直检查故障。该项目调查正式模型，硬件实现和评估，以了解设备故障的影响和检测技术的影响。