CSR: SMALL: Formal Models, Processor Architecture, and Evaluation of Sampling for Hardware Reliability

器件物理、制造和工艺扩展中的工程挑战提供了明显的信号。为未来技术生产可靠晶体管的挑战。许多学术专家、工业联盟和研究小组都警告说，未来几代的硅技术在多核芯片上的可靠性可能会大大降低，因为多核芯片的核心可能会出现故障。由于硅的缺陷而产生的电场即将到来。在可靠性降低的同时，个人能源消耗？晶体管的效率跟不上晶体管密度的增加。这两种趋势预示着一场完美风暴的到来：随着能源消耗的增加，全球经济将迎来一场完美风暴。晶体管的速度正在放缓，它们变得高度不可预测，这将迫使进一步的效率低下。解决硬件可靠性是微处理器的一个基本问题，因此也是维持IT革命的一个基本问题。这个项目着眼于允许芯片和高级软件在设备故障时继续工作的机制。该项目研究的基本思路是如何检测芯片故障。这个项目的核心理念是采样原则。与其一直检查故障，不如使用周期性采样窗口来检查设备故障。该项目研究了正式模型、硬件实现和评估，以了解设备故障的影响和检测技术的影响。

Device physics, manufacturing, and engineering challenges in process scaling are providing signi?cant challenges in producing reliable transistors for future technologies. Many academic experts, industry consortia, and research panels have warned that future generations of silicon technology are likely to be much less reliable with multi-core chips with cores failing in the ?eld due to faults in silicon are around the corner. Concurrently with the reducing reliability, the individual energy ef?ciency of transistors is not keeping up with increase in transistor density. These two trends portend a perfect storm: as the energy ef?ciency of transistors is slowing down, they are becoming highly unpredictable which will force further inef?ciencies. Addressing hardware reliability is a fundamental problem for microprocessors and hence for sustaining the IT revolution. This project looks at mechanisms for allowing chips and the higher levels of software to continue working even when devices fail. The basic idea the project looks at is how to detect when chips fail.The core idea that this projrct builds upon is the principle of Sampling. Instead of checking for failures all the time, the idea is to use a periodic sampling window for checking for device failures. The project investigates formal models, hardware implementation, and evaluation to understand the effect of device failures and the impact of the detection techniques.