Implementation of quantum LDPC codes and fault-tolerant logic gates in physical architectures

量子纠错（QEC）是一种用于开发量子技术的工具，该技术对由于与环境的不必要的相互作用而导致的不可避免的错误具有鲁棒性。QEC可用于构造主动校正的量子存储器[1]，并且考虑串联的容错门导致容错量子计算的发展。在经典纠错领域内，低密度奇偶校验（LDPC）码是公知的线性纠错码，其已经被研究了几十年并且广泛地用于现代通信网络中。它们的特征在于稀疏奇偶校验矩阵（PCM），关键指标是物理位数，编码位数和代码的距离。量子LDPC（qLDPC）码的目标是在由错误的量子性质所施加的不同限制集合下最大化相同的度量。近年来，在构造良好的量子纠错码方面有许多发展[2]：那些以码距离和编码率与物理量子比特数的线性（或近线性）缩放为特征的量子纠错码。然而，这些速率仅渐近地接近[3，4，5]，这使得它们在真实的系统中的性能和实现不可行或未知。当考虑好的代码和物理限制时，也存在权衡，例如对代码局部性的限制，这反过来又限制了编码率和距离[6，7]。博士项目的目的将是努力构建适合真实的架构的良好量子纠错码。博士学位的结构是在实现容错和良好的qLDPC码的保护伞下的一系列项目。这将涉及qLDPC码的数值模拟，以及在将它们调整为现实实现之前理解它们的构造。除了代码构建之外，逻辑门的容错实现也将被考虑，因为它们在量子信息处理中发挥着至关重要的作用。

Quantum error correction (QEC) is a tool for developing quantum technologies that are robust against unavoidable errors due to unwanted interactions with the environment. QEC can be used to construct actively-corrected quantum memories [1], and the consideration of fault-tolerant gates in tandem leads to development of fault-tolerant quantum computation. Within the field of classical error correction, low density parity check (LDPC) codes are well-known linear error-correcting codes that have been studied for decades and are widely used in modern communication networks. They are characterised by a sparse parity check matrix (PCM), with key metrics being the number of physical bits, encoded bits, and distance of the code. Quantum LDPC (qLDPC) codes aim to maximise the same metrics under the different set of restrictions imposed by the quantum nature of the errors. In recent years, there have numerous developments in constructing good quantum error-correcting codes [2]: those characterised by linear (or near-linear) scaling of code distance and encoding rate with the number of physical qubits. However, these rates are only approached asymptotically [3, 4, 5], which makes their performance and implementation in real systems either unfeasible or unknown. There also exist trade-offs when considering good codes and physical restrictions, e.g. constraints on the code locality which in turn bound the encoding rate and distance [6, 7]. The aim of the PhD projects will be to work towards building good quantum error-correcting codes tailored to real architectures. The structure of the PhD is given as a series of projects under the umbrella of achieving fault tolerance and good qLDPC codes. This would involve numerical simulation of qLDPC codes, as well as understanding their construction before tailoring them towards realistic implementation. Beyond code construction, fault-tolerant implementations of logic gates will also be considered due to the crucial part they play in quantum information processing.