Implementation of quantum LDPC codes and fault-tolerant logic gates in physical architectures

量子纠错(QEC)是一种用于开发量子技术的工具，该技术对由于与环境的不必要的相互作用而导致的不可避免的错误具有健壮性。量子纠错码可用于构造主动纠错的量子存储器[1]，而串联容错门的考虑导致了容错量子计算的发展。在经典纠错领域中，低密度奇偶校验码(LDPC)是研究了几十年的著名线性纠错码，在现代通信网络中得到了广泛的应用。它们的特征是稀疏奇偶校验矩阵(PCM)，关键度量是物理比特数、编码比特和码的距离。量子LDPC(QLDPC)码的目标是在错误的量子性质施加的不同限制集下最大化相同的度量。近年来，在构造好的量子纠错码方面有了许多进展[2]：这些发展的特征是码距离和编码率随着物理量子比特数的线性(或近线性)缩放。然而，这些速率只能渐近逼近[3，4，5]，这使得它们的性能和在实际系统中的实现要么是不可行的，要么是未知的。在考虑好的编码和物理限制时也存在权衡，例如对码局部性的限制，这进而限制了编码率和距离[6，7]。博士项目的目标将是致力于构建适合真实架构的良好量子纠错码。PHD的结构是在实现容错和良好的QLDPC码的保护伞下的一系列项目给出的。这将涉及QLDPC码的数值模拟，以及在将其调整为实际实施之前了解其结构。除了代码构建，逻辑门的容错实现也将被考虑，因为它们在量子信息处理中扮演着至关重要的角色。

Quantum error correction (QEC) is a tool for developing quantum technologies that are robust against unavoidable errors due to unwanted interactions with the environment. QEC can be used to construct actively-corrected quantum memories [1], and the consideration of fault-tolerant gates in tandem leads to development of fault-tolerant quantum computation. Within the field of classical error correction, low density parity check (LDPC) codes are well-known linear error-correcting codes that have been studied for decades and are widely used in modern communication networks. They are characterised by a sparse parity check matrix (PCM), with key metrics being the number of physical bits, encoded bits, and distance of the code. Quantum LDPC (qLDPC) codes aim to maximise the same metrics under the different set of restrictions imposed by the quantum nature of the errors. In recent years, there have numerous developments in constructing good quantum error-correcting codes [2]: those characterised by linear (or near-linear) scaling of code distance and encoding rate with the number of physical qubits. However, these rates are only approached asymptotically [3, 4, 5], which makes their performance and implementation in real systems either unfeasible or unknown. There also exist trade-offs when considering good codes and physical restrictions, e.g. constraints on the code locality which in turn bound the encoding rate and distance [6, 7]. The aim of the PhD projects will be to work towards building good quantum error-correcting codes tailored to real architectures. The structure of the PhD is given as a series of projects under the umbrella of achieving fault tolerance and good qLDPC codes. This would involve numerical simulation of qLDPC codes, as well as understanding their construction before tailoring them towards realistic implementation. Beyond code construction, fault-tolerant implementations of logic gates will also be considered due to the crucial part they play in quantum information processing.