X-Ray Detectors for Synchrotron-Based Structural Biology

提出了一种由大约2000×2000像素组成的X射线像素阵列探测器(PAD)的开发方案 加强同步加速器源的大分子结晶学数据收集 结合到像素电子层的集成电路层，使得每个像素具有其自己的处理电子焊盘 承诺将数据收集时间比现有检测器减少多达40倍，同时提高数据质量 他们将拥有特定的能力来 1使用标准振荡法(0.5%)在18秒内采集一组单色数据(90°旋转) 帧，曝光时间为每帧100ms) 2在90秒内采集一组细切片数据，每帧旋转0.05°，曝光50ms 每帧 3采集微秒曝光时间的帧，用于时间分辨蛋白质劳厄衍射 在该方案的第一阶段期间的研究成功地识别了混合模式模拟/数字像素 最适合于结晶学应用的体系结构，以及演示解决辐射的方法 损坏涉及输入信号通过电荷到电压转换器被模拟集成到电容器C_NT上 电荷积分器级使用与现有APAD中的结构非常相似的结构来设计电压 通过中的电压比较器不断地将电容器上的电压与外部参考电压Vref进行比较 阈值检测器级当积分电压电平达到参考电压时，产生一个位，并 将阈值检测器添加到像素内数字计数器中，然后还会重置 电荷积分器级因此，填充C_nt的每个模拟周期在高 在曝光帧结束时，对存储在像素内数字计数器中的字进行排序，电压电平保持为开 如果需要，在这种数字化的每一行像素的末端，通过模数转换器(ADC)对GINT进行数字化 因此，值是曝光阶段II的低阶数字字将涉及特定像素的定稿 适当大面积集成电路的布局、制造、全尺寸焊盘的组装和应用测试 Performmanceite(S)(组织、市、州) 1 0 ADSC，12550 Stowe Drive，加利福尼亚州波威，邮编92064 14853纽约州伊萨卡市克拉克霍尔，康奈尔大学物理系 加州拉荷亚吉尔曼大道9500号加州大学圣迭戈分校3号，邮编：92093 关键人员请参阅说明，使用需要的续页以如下所示的格式提供所需信息 从首席调查员开始列出所有其他关键人员按字母顺序排列，姓氏在前 命名项目中的组织角色 哈姆林，罗纳德，Ph D ADSC Pi 马特·阿林，ADSC技术员 安杰罗，苏珊，BS ADSC流程开发 电气工程师(待定)BS ADSC电子开发 霍兹，Tom MBA，MS ADSC项目总监/Pck Engr 尼尔森，马萨诸塞州ADSC软件工程师 弗农，韦恩博士，ADSC测试工程师 Gruner，Sol，Ph D Cornell Pad Development 马克·泰特，康奈尔大学设计工程博士 阮慧、徐勇、博士UCSD Pad开发 披露许可声明适用于SBIPJSTTROnnly。请参阅说明[]是[]否 小灵通398(05/01版)首页 2. 表格通过05/2004 OMB编号0925-0001 研究补助金 目录 页码 正面页.....................................1 2. 描述，

Development is proposed of an x-ray Pixel Array Detector (PAD) consisting approximately of 2,000x2,000 pixels to enhance macromolecular crystallographic data collection at synchrotron sources A PAD consists of an x-ray sensing integrated circuit layer bonded to a pixel electronics layer such that each pixel has its own processing electronics PADs promise to reduce data collection time by up to a factor of 40 relative to existing detectors while improving data quality They will have specific capability to 1 Collect a set of monochromatic data (90 ¿ rotation) in 18 seconds using the standard oscillation method (0 5 ¿ per frame, with exposure time of 100 ms per frame) 2 Collect a set of fine-slice data in 90 seconds with a rotation of 0 05 ¿ per frame and with an exposure of 50 ms per frame 3 Collect frames at microsecond exposure time for time-resolved protein Laue diffraction Research during Phase I of this proposal was successful in identifying a mixed-mode analog/digital pixel architecture best suited for the crystallographic application, as well as demonstrating ways of resolving radiation damage concerns The input signal is analog integrated onto a capacitor, C_nt,by a charge to voltage converter in the charge integrator stage using a structure very similar to the one in the existing APAD designs The voltage on the capacitor is constantly compared to an external reference voltage, Vref, via a voltage comparator in the threshold detector stage When the integrated voltage level reaches the reference voltage, a bit is generated and added into an in-pixel digital counter The threshold detector then also resets the integration capacitor in the charge integrator stage Thus, each analog cycle of filling C_ntresults in an additional digital "count" in the high- order word stored in the in-pixel digital counter At the end of the exposure frame, the voltage level remaining on Gin t is digitized, if desired, by an analog-to-digital converter (ADC) at the end of each row of pixels This digitized value is thus the low-order digital word of the exposure Phase II will involve finalization of the specific pixel layout, fabrication of suitably large-area integrated circuits, assembly and application testing of a full-scale PAD PERFORMANCESITE(S) (organization,city, state) 1 0 ADSC, 12550 Stowe Drive, Poway, CA, 92064 2 0 Cornell University, Physics Dept, Clark Hall, Ithaca, NY 14853 3 0 UCSD, 9500 Gilman Drive, La Jolla, CA, 92093 KEY PERSONNEL See instructions Use continuationpagesas needed to providethe requiredinformation in theformat shownbelow Startwith Principal InvestigatorListall other key personnelinalphabeticalorder,lastnamefirst Name Organization Role on Project Hamlin, Ronald, Ph D ADSC PI Allin, Matt ADSC Technician Angello, Susan, BS ADSC Process Development Electrical Engineer (TBD) BS ADSC Electronic Development Hontz, Tom MBA, MS ADSC Program Director/Pck Engr Nielsen, Chris, MA ADSC Software Engineer Vernon, Wayne, Ph D ADSC Test Engineer Gruner, Sol, Ph D Cornell PAD Development Tate, Mark, Ph D Cornell Design Engineering Nguyen-huu, Xuong, Ph D UCSD PAD Development Disclosure Permission Statement Applicableto SBIPJSTTROnly. Seeinstructions [] Yes [] No PHS 398 (Rev 05/01) face page 2 Form ApprovedThrough 05/2004 OMB No 0925-0001 RESEARCH GRANT TABLE OF CONTENTS Page Numbers Face Page ..................................... 1 2 Description,