C3D: Communication Centric Computer Design

我们正处于计算设备设计的关键时刻。技术的扩展有利于晶体管而不是电线，这已经将我们带入了一个通信比计算本身需要更多时间和更多电力的时代。我们相信，这一技术驱动因素将不可避免地推动我们从硬件和软件两个角度对计算机系统设计采取以通信为中心的方法。这一拨款申请的重点是从工程设计到计算机体系结构、编译器设计、语言设计和应用程序映射，探索计算机系统设计的这种以通信为中心的新观点。我们希望这笔赠款形成一个或多个项目，以应对涉及数千个高能效处理器的未来计算系统。以通信为中心的设计可以在几个抽象级别上进行查看：级别0-实现技术，其中我们将重点放在芯片上的通信网络上。级别1-计算机体系结构，专注于系统中通信流程的优化。级别2-算法映射，允许在多核心计算表面上自动放置数据和代码。级别3-编程语言和编译器设计，允许并行性和局部性易于表达。还将构建基于FPGA的模拟基础设施，以允许从级别0和1的硬件工作中获得研究结果，并有效地支持在2级和3级进行的软件研究。

We are at a pivotal point in the design of computational devices.Technology scaling favours transistors over wires which has moved usinto an era where communication takes more time and consumes morepower than the computation itself. We believe that this technologydriver inextricably pushes us toward a communication-centric approachto computer system design from both hardware and softwareperspectives. This grant application is focused on exploring this newcommunication-centric view of computer system design from engineeringwires through computer architecture, compiler design, language designand application mapping. It is our wish that this grant form aportfolio of projects tackling future computational systems involvingthousands of power efficient processors.Communication-centric design can be viewed at several levels ofabstraction:Level 0 - implementation technology, where we will focus oncommunication networks-on-chip.Level 1 - computer architecture, focusing on optimisation ofcommunication flows in the system.Level 2 - algorithm mapping to allow automated placement of data andcode across a manycore computing surface.Level 3 - programming language and compiler design to allowparallelism and locality to be easily expressed.An FPGA based simulation infrastructure will also be constructed toallow research results to be obtained from hardware work at levels 0and 1, and to efficiently support software research undertaken atlevels 2 and 3.