Ka-band CMOS for communications applications

用于通信应用的 Ka 波段 CMOS

• 批准号: 261735-2007
• 负责人: Frank, Brian
• 金额: $ 1.31万
• 依托单位: Queen's University
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2007
• 资助国家: 加拿大
• 起止时间: 2007-01-01 至 2008-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=365177
• 关键词: Ka; band; CMOS; communications; applications

The objective of the proposed research is to model and experimentally investigate high-speed microelectronics for microwave and millimeter wave communication systems using complementary metal oxide semiconductor (CMOS) processes, commonly used for digital circuits. Since circuit fabrication costs in CMOS can be significantly lower than most of the traditional microwave technologies, they offer significant competitive advantages to manufacturers. This emerging area of research has applications for both wireless and  photonic systems.Three primary thrusts are proposed. Firstly, the project will develop and test novel high speed planar inductive interconnects between planar off-chip antennas and CMOS electronics. The integration of antennas with silicon circuits is a very challenging problem, as traditional low-resistivity silicon substrates significantly degrade the efficiency of antennas when in close proximity.The second major thrust is the development of low-loss inductive elements for CMOS low noise amplifiers (LNAs), mixers, and voltage controlled oscillators (VCOs). The loss of traditional passive elements significantly degrade performance of CMOS circuits at these frequencies.The third major thrust is the completion of a completely integrated differential CMOS front-end at 24 GHz using an inexpensive 0.18 um process. Using techniques developed in the first two thrusts, the performance of a differential receiver consisting of an integrated antenna with an LNA, mixer, and voltage controlled oscillator will be assessed.This project proposes to develop techniques that enable the development of compact, low cost communication systems at high data rates.

这项研究的目的是对微波和毫米波通信系统中使用互补金属氧化物半导体(CMOS)工艺的高速微电子学进行建模和实验研究，该工艺通常用于数字电路。由于CMOS的电路制造成本可以显著低于大多数传统的微波技术，它们为制造商提供了显著的竞争优势。这一新兴的研究领域同时适用于无线和无线光子系统。提出了三个主要推动力。首先，该项目将开发和测试平面片外天线与CMOS电子学之间的新型高速平面电感互连。天线与硅电路的集成是一个非常具有挑战性的问题，因为传统的低阻硅衬底在接近时会显著降低天线的效率。第二个主要推动力是开发用于CMOS低噪声放大器(LNA)、混频器和压控振荡器(VCO)的低损耗电感元件。传统无源元件的损耗显著降低了在这些频率下的电路性能。第三个主要推力是使用廉价的0.18微米工艺在24 GHz下完成完全集成的差分CMOS前端。使用前两个推力中开发的技术，将评估由集成天线、低噪声放大器、混频器和压控振荡器组成的差分接收器的性能。该项目建议开发能够在高数据速率下开发紧凑、低成本通信系统的技术。