Application of error-control codes to digital systems testing

误差控制码在数字系统测试中的应用

• 批准号: 239208-2006
• 负责人: Geurkov, Vadim
• 金额: $ 0.87万
• 依托单位: Ryerson University
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2008
• 资助国家: 加拿大
• 起止时间: 2008-01-01 至 2009-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=394265
• 关键词: Application; error; control; codes; digital

Reconfigurable Computing Platforms (RCPs) based on programmable logic devices (PLDs) have been widely used in various areas: aerospace, flexible manufacturing, wireless communication, etc. The primary reason for this use is the ability of such RCPs to adapt their hardware to the algorithm and data structure of the application. This important feature ensures high cost-performance characteristics compared to conventional microprocessor based platforms. Increasing level of complexity of nowadays applications has made an SRAM based Field Programmable Gate Array (FPGA) the most suitable choice for a PLD. However, such FPGAs are highly susceptible to radiation and other environmental factors. With reduction of a VLSI feature size the susceptibility tends to increase inhibiting the use of SRAM FPGA based RCPs in nuclear power stations, aerospace, and military areas, which are the most demanding for RCPs. The main objective of the proposed research is to develop testing methods oriented to digital devices, which will be applicable to SRAM FPGA based RCPs and will increase their fault tolerance. To achieve this objective the following tasks will be accomplished: - Error-Control Codes (ECC) will be reviewed in terms of applicability to on-line testing of digital devices - Encoding/decoding algorithms and encoder/decoders with simple hardware implementation will be analyzed - Self-checking as well as off-line digital testing methods based on the most efficient ECC will be examined - Applicability of the testing methods based on the ECC to partially reconfigurable FPGAs (e.g. Xilinx Virtex family) will be scrutinized - Hardware recovery procedures based on relocation of data-processing micro-architectures in FPGAs (with possible performance degradation) will be investigated. The outcome of the research will be invention of new on-line and off-line digital testing methods, which will contribute to development of a high-performance dependable RCP with improved lifetime parameters.

基于可编程逻辑器件（PLD）的可重构计算平台（RCP）已被广泛应用于各个领域：航空航天，柔性制造，无线通信等。这种使用的主要原因是这种RCP能够使其硬件适应应用程序的算法和数据结构。与传统的基于微处理器的平台相比，这一重要特性确保了高性价比。当今应用的复杂程度的增加使得基于SRAM的现场可编程门阵列（FPGA）成为PLD的最合适的选择。然而，这种FPGA对辐射和其他环境因素非常敏感。随着VLSI特征尺寸的减小，敏感性趋于增加，抑制了基于SRAM FPGA的RCP在对RCP要求最高的核电站、航空航天和军事领域中的使用。建议的研究的主要目标是开发面向数字设备的测试方法，这将适用于SRAM FPGA为基础的RCP，并将增加他们的容错能力。为实现这一目标，将完成以下任务：- 检讨错误控制码（ECC）对数码装置的联机测试的适用性-分析编码/译码算法及简单硬件实现的编码器/译码器-研究自我检查及以最有效的ECC为基础的脱机数码测试方法-将仔细检查基于ECC的测试方法对部分可重构FPGA（例如Xilinx Virtex系列）的适用性-将研究基于FPGA中数据处理微架构重新定位的硬件恢复程序（可能会导致性能下降）。研究的结果将是新的在线和离线数字测试方法的发明，这将有助于开发具有改进寿命参数的高性能可靠RCP。