Low Power, Area Efficient, High Speed Algorithms and Architectures for Computer Arithmetic, Pattern Recognition and Cryptosystems

用于计算机算术、模式识别和密码系统的低功耗、面积高效、高速算法和架构

• 批准号: 1686-2013
• 负责人: Ahmadi, Majid
• 金额: $ 3.72万
• 依托单位: University of Windsor
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2015
• 资助国家: 加拿大
• 起止时间: 2015-01-01 至 2016-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=568210
• 关键词: Low; Power; Area; Efficient; Speed

The objectives of the proposed research are: (a) To further extend the state-of-the-art for the Finite Field Multiplication in F(2**m) for applications to elliptic curve cryptography. We will look at implementation for the proposed architectures as ASIC at the transistor level to reduce power consumption and to improve speed. We will also look at GPU configurations as a paradigm for implementation of our proposed architectures. (b) To further extend the state-of-the-art for the design, implementation and application of arithmetic circuits using the Continuous Valued Number System (CVNS).The application of this number system for multi-layer neural networks will be investigated. A thorough evaluation of the resulting next-generation circuit designs and their comparison with current state-of-the-art binary designs will be carried out. (c) To further develop robust and low error rate algorithms for pattern recognition applications. Specifically we are interested in applications such as human face recognition using new feature extractors and classifiers. We are looking into developing algorithms for face recognition under occlusion, varying or poor illumination and low resolution. We will be looking at the optimization of these algorithms for implementation on both GPU, for high speed operation, and low-power architectures. We shall further explore the development of new algorithms for face recognition with 3-D images. The development of algorithms and architectures that can support a face recognition capability on cellular smart phones that can be used to optimize functionality, security and power management based on visual cues will also be investigated. This research is considered significant as further progress in a number of diverse application areas beneficial to Canada is contingent upon developing competitive low-cost, low-power, high-speed area efficient DSP algorithms and architectures that enable synergy.

拟议研究的目标是： （一） 为了进一步扩展F（2**m）中有限域乘法的现有技术，将其应用于椭圆曲线密码学。我们将着眼于晶体管级ASIC架构的实现，以降低功耗并提高速度。 我们还将把GPU配置作为实现我们提出的架构的范例。 （B） 为了进一步推广连续值数字系统（CVNS）在算术电路设计、实现和应用方面的先进技术，我们将研究这种数字系统在多层神经网络中的应用。一个彻底的评估所产生的下一代电路设计，并与当前国家的最先进的二进制设计进行比较。 （c）第（1）款 进一步开发用于模式识别应用的鲁棒和低错误率算法。 具体来说，我们感兴趣的应用程序，如人脸识别使用新的特征提取器和分类器。 我们正在研究开发算法的人脸识别下的遮挡，变化或不良照明和低分辨率。我们将研究这些算法在GPU上实现的优化，以实现高速操作和低功耗架构。我们将进一步探索新的算法的发展与三维图像的人脸识别。还将研究能够支持蜂窝智能手机上的人脸识别能力的算法和架构的开发，这些智能手机可用于基于视觉线索优化功能、安全性和电源管理。 这项研究被认为是重要的，因为在许多不同的应用领域的进一步进展，有利于加拿大是有赖开发有竞争力的低成本，低功耗，高速区域高效的DSP算法和架构，使协同作用。