Low Power, Area Efficient, High Speed Algorithms and Architectures for Computer Arithmetic, Pattern Recognition and Cryptosystems

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The objectives of the proposed research are:(a) To further extend the state-of-the-art for the Finite Field Multiplication in F(2**m) for applications to elliptic curve cryptography. We will look at implementation for the proposed architectures as ASIC at the transistor level to reduce power consumption and to improve speed. We will also look at GPU configurations as a paradigm for implementation of our proposed architectures.(b) To further extend the state-of-the-art for the design, implementation and application of arithmetic circuits using the Continuous Valued Number System (CVNS).The application of this number system for multi-layer neural networks will be investigated. A thorough evaluation of the resulting next-generation circuit designs and their comparison with current state-of-the-art binary designs will be carried out.(c) To further develop robust and low error rate algorithms for pattern recognition applications. Specifically we are interested in applications such as human face recognition using new feature extractors and classifiers. We are looking into developing algorithms for face recognition under occlusion, varying or poor illumination and low resolution. We will be looking at the optimization of these algorithms for implementation on both GPU, for high speed operation, and low-power architectures. We shall further explore the development of new algorithms for face recognition with 3-D images. The development of algorithms and architectures that can support a face recognition capability on cellular smart phones that can be used to optimize functionality, security and power management based on visual cues will also be investigated.This research is considered significant as further progress in a number of diverse application areas beneficial to Canada is contingent upon developing competitive low-cost, low-power, high-speed area efficient DSP algorithms and architectures that enable synergy.