Error Resilient Machine Learning Systems

自动驾驶汽车 (SDC) 或自动驾驶汽车已变得越来越流行，它们有望在不久的将来彻底改变我们的生活。谷歌、Uber、Nutonomy、沃尔沃等公司已经在道路上部署 SDC，并表明 SDC 几乎已准备好投入生产使用。加拿大许多省份（例如安大略省）已通过法律，允许在公共道路上使用 SDC。 专家预测，SDC 将在未来 5 到 10 年内大规模采用。 SDC 具有许多社会效益，例如大幅减少导致生命和财产损失的事故数量，并使驾驶更安全。** 如今，SDC 依靠在专用硅芯片上执行的复杂算法来执行行人检测等关键任务。软件或硬件中的任何错误都会对汽车的安全产生不利影响。不幸的是，由于硅器件尺寸不断缩小，硬件变得越来越不可靠，这虽然有助于提高性能，但也使它们更容易受到粒子撞击和制造缺陷的影响。与软件故障不同，即使软件已经过充分测试，硬件故障也可能在不可预测的随机位置出现。因此，它们不能在设计时被消除。此外，它们可能会导致灾难性的后果，因为软件通常没有准备好处理硬件故障。因此，迫切需要使 SDC 中的计算机芯片可靠，并确保硬件故障不会导致 SDC 中的安全问题。** 该提案将研究软件和硬件技术，以确保 SDC 中部署的系统的可靠性。 主要思想是创新地共同设计SDC中部署的硬件和软件，以利用软件提供的内在弹性，设计硬件以提供可调的可靠性，并探索能够屏蔽或容忍硬件故障的创新软件算法。 我们还会考虑芯片的功耗，共同优化功耗和可靠性。 **

Self Driving Cars (SDCs) or autonomous vehicles have become increasingly popular, and they promise to revolutionize our lives in the near future. Already, companies such as Google, Uber, Nutonomy, Volvo, are deploying SDCs on roads, and have shown that SDCs are almost ready for production use. Many Canadian provinces have already passed laws allowing the use of SDCs on public roads, e.g., Ontario. Experts have predicted the large-scale adoption of SDCs within the next 5 to 10 years. SDCs offer many societal benefits such as drastically reduce the number of accidents resulting in loss of life and property, and make driving safer.** SDCs today rely upon complex algorithms executing on specialized silicon chips for their key tasks such as pedestrian detection. Any error in either the software or the hardware can adversely affect the safety of the car. Unfortunately, hardware is becoming less and less reliable due to the scaling of silicon devices to smaller sizes, which while aiding performance, has made them much more susceptible to particle strikes and manufacturing defects. Unlike software faults, faults in the hardware can arise unpredictably and at random locations, even if the software has been well tested. Thus, they cannot be eliminated at design time. Further, they can lead to devastating consequences as software is often unprepared to deal with hardware faults. Therefore, there is a compelling need to make the computer chips in SDCs reliable and to ensure that hardware faults do not lead to safety compromises in SDCs.** This proposal will investigate both software and hardware techniques for ensuring the reliability of the systems deployed in SDCs. The main idea is to innovatively co-design the hardware and software deployed in SDCs to leverage the intrinsic resilience afforded by software, design the hardware to provide tunable reliability, and explore innovative software algorithms that are capable of masking or tolerating hardware faults. We will also take into account the power consumption of the chip, and jointly optimize both power and reliability. **