Overcoming Challenges in Stochastic Computing to Enable Efficient Next-Generation Microelectronic Systems

高性能微电子电路设计实践通常关注成本、吞吐量和能源消耗方面的竞争。这一努力往往是为了提高精度，而设计决策是由最坏情况分析驱动的。然而，这种方法可能会导致过度设计的系统，其能源成本高于目标应用程序的基本需求。 随机计算是一种技术，它的历史可以追溯到冯·诺伊曼在20世纪50年代所做的工作，这种技术反直觉地利用随机性来促进计算，可能会降低硬件成本和功耗。20世纪60年代报道了许多基本结果，例如使用单个AND门进行乘法。使用随机生成的码元流在时间域中执行随机计算，其中感兴趣的数量是二进制序列的时间平均值。在20世纪70年代，集成电路技术的进步减轻了减少晶体管数量的需要。因此，从20世纪70年代中期到90年代，对随机计算的研究实际上停滞不前。然而，现在随机计算出现了复兴，它已经成为一种有效的前向差错控制技术。在文献中已经报道了几个多千兆比特每秒的解码器。随机计算的容错性也为新的纳米技术提供了一个有吸引力的选择。 尽管取得了这些进展，但要更广泛地采用随机计算仍存在障碍： (1)随机计算使用随机位序列的时间平均来表示量。生成这些序列并维护所需的独立性属性是昂贵的。 (2)通常需要数千个码元中的长序列以达到期望的精度水平。这要么会导致长延迟，要么会导致极高的时钟速度要求。此外，可能存在较高的开关活动(和功耗)。 (3)由于其随机性，随机计算系统在性能和/或精度上没有绝对保证；这可能是某些敏感应用(例如，在生物医学领域)的绊脚石。 通过拟议的研究计划，申请者和他的团队将致力于解决这三个挑战，并将结果应用于为信号处理和机器学习中的新兴应用设计高效的硬件。

High-performance microelectronic circuit design practices often focus on competing dimensions of cost, throughput, and energy consumption. The push is often towards higher precision, and design decisions are driven by worst-case analysis. However, this approach can lead to over-engineered systems that have a greater energy cost that what is fundamentally needed by the target application. Stochastic computing is a technique that traces its history back to work done by Von Neumann in the 1950s, and that counter-intuitively uses randomness to the benefit of computation, possibly leading to lower hardware cost and power consumption. Many fundamental results were reported in the 1960s, e.g., multiplication using single AND gates. Stochastic computations are performed in the time domain using streams of randomly generated symbols, where the quantity of interest is the time average of a binary sequence. In the 1970s, progress in integrated circuit technologies alleviated the need to reduce transistor count. Consequently, research into stochastic computing effectively halted from the mid-1970s until the 1990s. However, there is now a renaissance in stochastic computing, and it has become an effective technique for forward error control. Several multi-Gigabit-per-second decoders have been reported in the literature. Stochastic computation's fault tolerance also makes in an attractive option for novel nanoscale technologies. Despite these advances, there are obstacles towards wider adoption of stochastic computing: (1) Stochastic computing represents quantities using time averages of random sequences of bits. Generating these sequences and maintaining desired properties of independence is costly. (2) Long sequences in the thousands of symbols are often required to reach desired levels of accuracy. This either leads to long latencies or to extremely high clock speed requirements. Furthermore, there may be high switching activity (and power consumption). (3) Because of their random nature, stochastic computing systems do not have absolute guarantees on performance and/or accuracy; this can be a stumbling block in some sensitive applications (e.g., in the biomedical sector). Through the proposed research program, the applicant and his team will work towards addressing these three challenges, and will apply the results to design efficient hardware for emerging applications in signal processing and machine learning.