Exploiting Hardware Heterogeneity for Efficient Execution of Emerging Applications

拟议的工作将开发计算系统，以满足对性能和能源效率的迫切需求。这项研究将影响未来的能源消耗，能源成本和温室气体排放，从而为加拿大人带来重大的经济和环境效益。这项工作的主要重点是构建未来的电力和能源效率系统，可以显着提高计算机视觉，人工智能，生物信息学和网络搜索等许多重要应用的执行效率。我们的研究旨在通过使用具有不同类型的基于硬件的加速器的异构计算系统来实现这种能源效率。这种方法的关键独特性在于我们将在整个系统堆栈中应用的技术的广度和深度：基于硬件的加速，数据压缩和内存计算。在大多数地区（包括加拿大），计算机结构和系统领域的高素质人才短缺。该计划将培训计算系统中的许多HQP，他们将获得计算机架构，系统，性能分析，编译器，低级和系统编程以及编程现有硬件加速器（如图形处理单元（GPU）和现场可编程门阵列（FPGA））的重要技能。 该计划包括几个主要的研究方向。 1.我们的目标是确定正确的编程模型和调优/映射算法，以最有效地利用现有的硬件加速器。目前，这样做的负担福尔斯几乎完全落在单个应用程序开发人员身上。 2.我们将寻找有效的硬件和软件优化，以改善现代硬件加速器在新兴应用（如深度神经网络（DNN））中的资源和内存使用。特别是，DNN训练是一个需要大量内存的过程，即使在最先进的GPU加速器中也无法使用。我们将利用我们在节能和高性能数据压缩和编码方面的专业知识，显著降低现有DNN训练算法的内存消耗。 3.我们将探索更激进的优化的潜力，包括（但不限于）（1）有损压缩和（2）直接执行压缩数据，这将允许进一步提高性能和能源效率。

The proposed work will develop computing systems that will address the urgent need for performance and energy efficiency. This research will impact future energy consumption, energy costs, and greenhouse gas emissions, and will consequently lead to significant economic and environmental benefits for Canadians. The major emphasis of this work is on building future power and energy-efficient systems that can significantly improve the efficiency of execution for many important applications in of computer vision, artificial intelligence, bioinformatics, and web search. Our research aims to achieve this energy efficiency by using heterogeneous computational systems with different types of hardware-based accelerators. The key uniqueness of this approach is both the breadth and depth of techniques we will apply across the whole systems stack: hardware-based acceleration, data compression, and in-memory computation. In most geographical locations (including Canada) there is shortage of highly qualified personnel (HQPs) in the computer architecture and systems fields. This program will train many HQPs in computing systems who will gain important skills in computer architecture, systems, performance analysis, compilers, low-level and systems programming, and programming existing hardware accelerators, such as graphics processing units (GPUs) and field-programmable gate-arrays (FPGAs). This program consists of several major research directions. 1. We aim to identify the right programming models and tuning/mapping algorithms for the most efficient use of existing hardware accelerators. Currently, the burden of doing so falls almost entirely on individual application developers. 2. We will search for efficient hardware and software optimizations to improve the resource and memory use of modern hardware accelerators in emerging applications such as deep neural network (DNNs). In particular, DNN training is a process that requires large amounts of memory that are not available even in state-of-the-art GPU accelerators. We will leverage our expertise in energy- and performance-efficient data compression and encoding to significantly reduce the memory consumption of existing DNN training algorithms. 3. We will explore the potential of more radical optimizations that would include (but are not limited to) (1) lossy compression and (2) direct execution on compressed data, which would allow to improve both performance and energy efficiency even further.