Performance for All: Broadening the Scope of Parallelism and Specialization

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Energy efficiency is the critical challenge facing modern computer architectures. Demand for higher performance will continue its historic growth, yet the technology scaling trends that backed decades of performance and efficiency improvements are now flat-lining. To meet user demand and continue performance scaling, architectures require new ways to reduce energy per operation. Parallelism (running many operations simultaneously) and specialization (customizing circuitry and data movement for a given application domain or set of patterns) are two well-known and complementary techniques to improve efficiency. A small minority of application domains have inspired significant investment into specialized architectures (e.g., Google's TPU), largely enabled by the enormous economic value of their domains, and "embarrassing" amounts of data parallelism which simplify hardware design. Unfortunately, for the vast majority of applications, the fixed cost of fabricating custom hardware is prohibitive, and in general they have more complex forms of irregular parallelism that are a poor match to modern multicores, GPUs, and other accelerators. These applications currently have no pathway to future performance gains, limiting the size and scope of problems that can be solved. This research program takes a holistic approach to improve performance for all by co-designing programming models, multicores, reconfigurable accelerators, compilers, and languges for the heavy tail of these underserved applications. We will solve compute bottlenecks in application domains such as statistical inference, graph analytics, electronic CAD, mathematical optimization, and more. Through the program, the PI will train highly-qualified personnel (HQPs) in the areas of computer architecture and systems which are sought-after in the technology industries within and outside Canada. Particular skills include performance analysis, compiler optimization, system simulation and prototyping, and hardware-software co-design. The PI will address equity, diversity, and inclusion (EDI) in HQP recruitment and the training environment. The PI will advertise broadly and recruit proactively to attract a diverse applicant pool. The PI will routinely emphasize EDI principles during training, and will raise HQP profiles by connecting those from under-represented minorities to groups such as Women in Computer Architecture or Black in AI.