Optimized Terabit-per-second Chip-to-Chip Communication over Heterogeneous Interconnect Fabrics
通过异构互连结构优化每秒太比特的芯片间通信
基本信息
- 批准号:555486-2020
- 负责人:
- 金额:$ 11.25万
- 依托单位:
- 依托单位国家:加拿大
- 项目类别:Alliance Grants
- 财政年份:2022
- 资助国家:加拿大
- 起止时间:2022-01-01 至 2023-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Our ability to communicate information into and out of integrated circuits is increasingly a bottleneck in all forms of computation and communication. Integrated circuit (IC) packaging and interconnect technologies have not, unfortunately, benefited from Moore's Law scaling. Thus, it has fallen to the designers of transmitter/receiver (transceiver) circuits to communicate information at higher speed over a fixed number of links within a relatively fixed power budget. Transceiver energy efficiency, density, and data rates have simultaneously improved for over a decade, but recently transceiver circuits have begun occupying an increasing fraction of the cost and power consumption of data-intensive ICs. Thus, paradigm shifts are required in the wide diversity of chip-to-chip interconnect inside modern infrastructure and enterprise computing, storage, and networking equipment. Typically, only a small minority of links exhibit worst-case combinations of channel loss and noise. The vast majority of links exhibit only modest loss and noise. Unfortunately, transceivers have been conservatively overdesigned for the worst-case conditions. Such over-design will be intolerable at next-generation data rates. Thus, this project seeks modulation and coding techniques suited to a wide diversity of link conditions, and circuits optimized for the lowest possible power consumption in all scenarios. We will also research optical communication technologies that will allow low-power and low-cost optical links to replace the worst-case electrical links in current systems. Furthermore, we seek methodologies for intelligent automatic co-optimization of all transceiver circuits (hundreds, or even thousands) in a piece of equipment to meet its instantaneous performance demands with minimal power consumption. The project will be undertaken with an industry-leading partner, whose support includes access to advanced FinFET IC technologies not normally available to academics. The unique training afforded to students and the research outcomes themselves promise tremendous benefits to Canada's large ICT sector, which increasingly underlies our society as a whole.
我们将信息传播到集成电路中的能力越来越多地在各种计算和通信中成为一种瓶颈。不幸的是,综合电路(IC)包装和互连技术并没有从摩尔的法律扩展中受益。因此,它落在了发射器/接收器(收发器)电路的设计师身上,以在相对固定的电力预算内的固定链接上以更高的速度传达信息。收发器的能源效率,密度和数据速率已在十年中同时提高,但是最近收发器电路已经开始占据数据密集型IC的成本和功耗的越来越多。因此,在现代基础架构和企业计算,存储和网络设备内部的芯片到芯片互连的多样性中,需要范式转移。 通常,只有少数链接表现出通道损失和噪声的最坏情况组合。 绝大多数链接仅表现出适度的损失和噪音。 不幸的是,在最坏情况下,收发器保守地设计了过度设计。 在下一代数据速率上,这种过度设计将是无法忍受的。 因此,该项目寻求适合各种链路条件的调制和编码技术,并且在所有情况下,为最低的功耗而优化了电路。 我们还将研究光学通信技术,该技术将允许低功率和低成本的光学链路替代当前系统中最差的电气链路。 此外,我们在一台设备中寻求对所有收发器电路(数百甚至数千)的智能自动合作的方法,以满足其瞬时性能需求,而功耗最少。 该项目将与一个行业领先的合作伙伴一起进行,其支持包括访问通常不可用学术界不可用的高级FinFET IC技术。 为学生提供的独特培训和研究成果本身为加拿大的大型ICT部门提供了巨大的好处,这越来越构成我们整个社会的基础。
项目成果
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相似海外基金
Optimized Terabit-per-second Chip-to-Chip Communication over Heterogeneous Interconnect Fabrics
通过异构互连结构优化每秒太比特的芯片间通信
- 批准号:
555486-2020 - 财政年份:2021
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$ 11.25万 - 项目类别:
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Optimized Terabit-per-second Chip-to-Chip Communication over Heterogeneous Interconnect Fabrics
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