Optimized Terabit-per-second Chip-to-Chip Communication over Heterogeneous Interconnect Fabrics

通过异构互连结构优化每秒太比特的芯片间通信

• 批准号: 555486-2020
• 负责人: ChanCarusone, Anthony
• 金额: $ 11.25万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Alliance Grants
• 财政年份: 2021
• 资助国家: 加拿大
• 起止时间: 2021-01-01 至 2022-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=721368
• 关键词: Optimized; Terabit; per; second; Chip

Our ability to communicate information into and out of integrated circuits is increasingly a bottleneck in all forms of computation and communication. Integrated circuit (IC) packaging and interconnect technologies have not, unfortunately, benefited from Moore's Law scaling. Thus, it has fallen to the designers of transmitter/receiver (transceiver) circuits to communicate information at higher speed over a fixed number of links within a relatively fixed power budget. Transceiver energy efficiency, density, and data rates have simultaneously improved for over a decade, but recently transceiver circuits have begun occupying an increasing fraction of the cost and power consumption of data-intensive ICs. Thus, paradigm shifts are required in the wide diversity of chip-to-chip interconnect inside modern infrastructure and enterprise computing, storage, and networking equipment. Typically, only a small minority of links exhibit worst-case combinations of channel loss and noise. The vast majority of links exhibit only modest loss and noise. Unfortunately, transceivers have been conservatively overdesigned for the worst-case conditions. Such over-design will be intolerable at next-generation data rates. Thus, this project seeks modulation and coding techniques suited to a wide diversity of link conditions, and circuits optimized for the lowest possible power consumption in all scenarios. We will also research optical communication technologies that will allow low-power and low-cost optical links to replace the worst-case electrical links in current systems. Furthermore, we seek methodologies for intelligent automatic co-optimization of all transceiver circuits (hundreds, or even thousands) in a piece of equipment to meet its instantaneous performance demands with minimal power consumption. The project will be undertaken with an industry-leading partner, whose support includes access to advanced FinFET IC technologies not normally available to academics. The unique training afforded to students and the research outcomes themselves promise tremendous benefits to Canada's large ICT sector, which increasingly underlies our society as a whole.

我们将信息传入和传出集成电路的能力日益成为所有形式计算和通信的瓶颈。不幸的是，集成电路(IC)封装和互连技术并未受益于摩尔定律。因此，发射机/接收机(收发机)电路的设计者需要在相对固定的功率预算内，在固定数量的链路上以更高的速度传输信息。十多年来，收发器的能效、密度和数据速率同步提高，但最近收发器电路在数据密集型IC的成本和功耗中所占的比例越来越大。因此，现代基础设施以及企业计算、存储和网络设备中的芯片到芯片互连的多样性需要进行范式转换。通常，只有一小部分链路表现出信道损耗和噪声的最坏情况组合。绝大多数链路只表现出适度的损耗和噪音。不幸的是，收发信机被保守地过度设计，以应对最坏的情况。在下一代数据速率下，这种过度设计将是无法容忍的。因此，该项目寻求适合各种链路条件的调制和编码技术，以及在所有情况下优化为尽可能低功耗的电路。我们还将研究光通信技术，使低功率和低成本的光链路取代目前系统中最糟糕的电子链路。此外，我们寻求对一台设备中的所有收发电路(数百个，甚至数千个)进行智能自动协同优化的方法，以满足其瞬时性能要求，并将功耗降至最低。该项目将与一个行业领先的合作伙伴一起进行，该合作伙伴的支持包括获得学术界通常无法获得的先进FinFET IC技术。为学生提供的独特培训和研究成果本身有望为加拿大庞大的信息和通信技术部门带来巨大好处，这一部门日益成为我们整个社会的基础。