Terabit-per-second die-to-die links over low-cost packaging substrates

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To enable the continued proliferation of digital connectivity, permeating virtually everything we touch worldwide, this project will advance key technologies for communicating data between two microchips located only millimetres apart. Huawei is a world-leader in the networking equipment that powers our mobile and infrastructure communication networks. Inside that equipment, hundreds of data streams are being communicated and routed between microchips at chips across circuit boards up to a meter in length. A major challenge in these backbone systems is, therefore, communicating broadband data across the circuit boards. Tremendous progress is achievable by locating the chips as closely together as possible. This has recently led to technologies permitting multiple microchip dies to be placed side-by-side onto a common packaging substrate separated by only a few millimetres. To reap the full potential of such package-level integration, the dies must be interconnected with terabit-per-second aggregate bandwidth. Existing solutions to this challenge employ silicon interposers as an advanced packaging substrate, but their high cost is fundamentally prohibitive for high-volume applications. This project will demonstrate key circuit building blocks to enable such links over inexpensive organic packaging substrates. In pursuit of these objectives, this project will provide advanced training for 5 graduate students conferring tremendous benefit upon the Canadian ICT sector.