Market assessment of an Spiking Neuron Implementation in Digital Hardware using a Sampling-Based Approach for Reduced Power Consumption

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Vast amounts of data are being generated and processed every single minute by AI solutions. Speed and power are becoming increasingly important factors for companies to consider and many have been looking toward neuromorphic systems as the answer. Neuromorphic systems model elements of a computer after systems in the human brain and nervous system. One of the most characteristic properties of real neural systems is their remarkably low power consumption in comparison to electrical hardware systems. Given the large networks of parallel neurons found in real biological systems, low power consumption is paramount to an effective and feasible electrical hardware replication. Many proposed spiking neuron and neuro-processor implementations offer substantial power savings compared to implementations prior to their proposal, however in each case limitations or restrictions are imposed on the implementation such as the use of a specific technology node, neuron model, and/or hardware implementation technique are required. The proposed patent-pending novel approach to digital hardware implementations of spiking neurons evaluates the neuron's differential equations at a frequency dependent on input current using a sampling-based approach. The variability in the frequency of the sampling reduces unnecessary switching activity for low-stimulus states. This novel Input-DEpendent Variable Sampling (I-DEVS) digital realization method to spiking neuron implementation results in neurons with minimal additional hardware resource usage in exchange for dramatic dynamic power savings as the switching activity is greatly reduced compared to traditional neuron implementations. This proposal will be working on a market assessment to better understand how to bring this innovative technology from the lab to the market.