5G移动通信、车联网、智能家庭、具有定位和监测功能的无线传感网络等诸多应用提出了强烈了毫米波通信-雷达一体化需求。基于申请人及团队在60GHz V波段全集成通信收发机及94GHz W波段雷达发射机的工作基础，采用CMOS工艺，面向60GHz通信高阶调制（64QAM及以上）及雷达高精度探测应用，开展可配置毫米波锁相环系统的设计理论和技术的创新性研究。. 对CMOS有源器件及无源器件寄生效应和损耗机制进行深入研究，揭示出其各自参数对压控振荡器等时钟电路性能的影响；提出基于双模压控振荡器的可配置∑-△小数分频锁相环结构，开展可配置锁相环系统优化方法及补偿技术研究，提升压控振荡器、分频器及∑-△调制器等关键电路及模块性能，形成较为完整的毫米波可配置锁相环设计理论及方法。. 以上方面的研究成果将有力推动我国通信-雷达一体化理论和技术的发展，为5G毫米波通信系统的实现提供有力支撑。

5G, internet of vehicles, intelligent family and sensor networks strongly call for combination of communication and radar functions. Based our previous result on 60 GHz communication RF transceiver and 94 GHz radar transmitter chips, using CMOS process, regarding the 60 GHz high-order communication (>64QAM) and precise radar applications, this project is to investigate the design theory and methodology for reconfigurable sigma-delta Fractional-N PLL.. After understanding the CMOS devices parasitic effects and loss mechanism, their effects on the key circuits’ performance will be demonstrated. Based on two-mode oscillator, then the reconfigurable sigma-delta Fractional-N PLL will be introduced and their optimization methodology and compensating techniques will be explored. Following research on design techniques of the VCO, frequency divider and frequency doubler and sigma-delta modulator, the design theory and methodology for reconfigurable sigma-delta Fractional-N PLL will be concluded. .It is believed that this project results will advance the integral system of communication and radar , and in the end give a strong support for 5G applications.