基于扩展的概率转移矩阵模型的高精度快速广义门电路可靠性评估方法研究

现有电路可靠性评估方法往往存在评估精度与计算复杂度难以同时兼顾的矛盾，导致不同抽象层次电路缺乏统一有效的高精度快速评估方法，使在实际应用中计算结果因标准的差异而不可靠。概率转移矩阵（PTM）模型是目前评估门级电路可靠性的前沿方法之一，其主要优势在于可充分利用矩阵理论对电路的行为特征精确建模，具有极大的灵活性和可扩展性，然而由于未有效处理并发性信号并忽略了电路低层信息，使其有着指数级的时空开销且实用性受限。本项目提出扩展的PTM模型：以晶体管级广义门电路为对象，首先将其结构逻辑抽象等价转换以满足模型对结构的要求；再引入二阶窄可靠度界限理论与多米诺骨牌理论以求取故障相关下的构件故障概率，并基于PTM量化3种屏蔽效应的影响；最后设计二进制与十进制相结合的混合编码机制以实现并发信号阻塞式处理，并基于弱等效原理构造针对PTM的迭代计算方法。通过该研究，以期实现不同抽象层次电路可靠性的高精度快速评估。

Existing methods for the evaluation of circuit reliability (ECR) are confronted with an incompatibility between estimation precision and computational complexity, while this leads to a missing of unified, highly efficient and fast evaluation method for the several-abstract-levels circuits in a high accuracy, which results in unreliable calculation results due to different standards in practical applications. Probabilistic transfer matrix (PTM) model is one of the state-of-the-art methods for the evaluation of gate-level circuit reliability. The main advantage of PTM model lies in its flexibility and extendibility since it could fully utilize the matrix theory to model circuit behaviors accurately. However, PTM model does not process concurrent circuit signals effectively and it ignores low-level circuit information, which usually leads to exponential time and space costs and limited applications. Thus in this paper, an extended PTM model (EPTM) for the ECR is proposed. Taking transistor-level generalized gates as research objects, firstly, we transform their structure logistic abstracts equivalently to satisfy the structure requirements of the EPTM. Secondarily, we introduce the theories of second-order narrow reliability bounds and domino to solve the component fault probabilities under fault dependency, and quantify the effects of logical masking, electrical masking and temporal masking based on PTM model. Finally, the binary-decimal coding mechanism will be designed to blockingly process the concurrent signals, and an iterative method will be proposed for PTM based on weak equivalence principle. According to this study, we try to implement fast, accurate reliability evaluation for the several abstract levels circuits.