物理不可克隆函数(Physical Unclonable Functions, PUF)电路属于芯片特征识别电路。它通过提取制造过程中无法避免引入的工艺偏差，产生无限多个特有的数据信息，具有唯一性、随机性和不可克隆性等特性，能有效实现身份认证和密钥产生。将其应用于信息安全芯片中，可以极大地提高密钥信息的安全性，达到防御各类攻击的目的。鉴此，本项目旨在通过对CMOS电路工艺偏差的研究，揭示芯片纹理特征与激励-响应之间的内在关系，提出新型PUF电路的集成电路设计方法，实现PUF电路与安全芯片的硬件复用。主要研究内容包括：PUF电路的模型构建及问题属性论证；高性能低成本PUF电路的结构设计；PUF电路与密码算法的融合应用；PUF电路的性能评测与优化等。研究成果将为新一代集成电路设计提供理论依据和方法指导，推动高性能安全芯片的广范应用。

Physical Unclonable Functions (PUF) is a fingerprint identification chip. The technique exploits static process variation across manufacturing process of integrated circuit to produce numerious unique, random and unclonable data. Because of its characteristics, PUF circuit can effectively fulfill authentication and key generation. With integrating into information security chip, PUF circuit greatly improve the security of key information, and resist various types of attacks. In project, goal of researching process variation is to reveal inherent relationship between physical features and challenge response pairs, to propose novel PUF circuit design technology, and implement hardware reuse technique between PUF circuit and security chip. Research domains contain mathematical modeling of PUF circuit and argumentation of property problem, designing of high-performance and low-cost PUF circuit, combining PUF circuit with cryptographic algorithms, and evaluation and optimization of PUF circuit performance. Research results will build a theoretical basis and guidance for the next generation of integrated circuit design, and promote the widespread application of high-performance security chip.