差分功耗分析(DPA) 攻击技术是诸多功耗分析旁道攻击中最有效且最容易实现的一种。它依赖于加密芯片在加密过程中功耗与所处理数据及所执行指令的关联，监测芯片在加密过程中的功耗曲线，利用统计等方法对收集到的信息进行分析，盗取与加密信息相关的数据，获得密钥，对密码芯片的信息安全构成极大威胁。鉴此，本项研究旨在通过防御DPA攻击机理、防御密码算法及防御芯片电路结构等的研究，探索防御DPA攻击的超大规模集成电路(VLSI)设计方法，提出新颖的防御 DPA攻击关键技术，实现信息的安全保护。主要研究内容包括：功耗独立数学模型建立及问题属性论证；完善保密性功耗独立密码体制构建；指令并行化功耗独立密码算法设计；二值/多值功耗独立VLSI实现；防御DPA攻击性能评价与优化等。研究成果将为防御 DPA攻击的VLSI设计提供理论依据和方法指导，推动高性能密码芯片的广泛应用，促进智能卡的健康发展。

Differential power analysis (DPA) is one of side channel attacks for it is efficient and easy to implement. DPA attack can succeed in obtaining the keys or security data related to the encrypted information by statistic analysis through establishing the relationship between power consumption and data or instructions by monitoring its power traces of encryption/decryption. So DPA is becoming a serious menace for cryptosystem. The goal of project is to propose novel technologies for DPA resistant with information security by exploring very large scale integration (VLSI) design method of DPA resistant, researching mechanisms of DPA resistant, resistant cryptographic algorithms and circuit structures of DPA resistant chip. So the project focuses on research as follows, mathematical modeling of power independent and its verification, building perfect secrecy one-time-pad cryptosystem, designing power independent cryptographic algorithms for instruction parallelism, implementing the binary/multi-valued power independent VLSI circuits, and evaluating and optimizing the DPA resistant performance. The research results are expected to provide a principle method to VLSI circuit design of DPA resistant, widening applications of high performance crypto chips, promoting the healthy development of the smart cards.