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Research Initiation: Integrating Compiler Technologies and Parallel MicroArchitectures for High Performance Micro System Design

Research Initiation: Integrating Compiler Technologies and Parallel MicroArchitectures for High Performance Micro System Design
研究启动:集成编译器技术和并行微架构以实现高性能微系统设计
批准号:
8809478
负责人:
Wen-mei Hwu
金额:
$7.4万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1988
资助国家:
美国
项目状态:
已结题
起止时间:
1988-06-01 至 1990-11-30

项目摘要

项目成果

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中文摘要
翻译
该项目的目标是为编译器、微体系结构和电路设计技术的集成提供有效的方法,以实现高性能。在编译器级别,重点是结合寄存器分配/分配和代码调度算法来利用体系结构并行性。在微体系结构级别,目标是研究编译器如何使用各种形式的并行性(如流水线和每个周期多条指令)来提高性能。在电路级,目的是应用新的存储器和逻辑设计技术来有效地支持微体系结构中的并行性。首席研究员是一名初级教员,作为博士生,他做了很好的研究。这项研究项目有很好的想法,很可能会在一个重要的研究领域取得新的成果。强烈建议提供资金。
英文摘要
The goal of this project is to derive effective approaches for integration of compiler, microarchitecture and circuit design techniques to achieve high performance. At the compiler level, the focus is to combine register allocation/assignment and code scheduling algorithms to exploit architecture parallelism. At the microarchitecture level, the objective is to investigate how various forms of parallelism (such as pipelining and multiple instructions per cycle) can be used by the compiler to improve performance. At circuit level, the intent is to apply novel memory and logic design techniques to efficiently support the parallelism in the microarchitecture. The principal investigator is a junior faculty who has done good research as a Ph.D. student. This research project has good ideas and it is likely that new results will be obtained in an important research area. Funding is highly recommended.
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会议论文
CRI-A Configurable, Application-Aware, High-Performance Platform for Trustworthy Computing
A New Approach to Accurate and Effiecient Pointer Analysis for Large C and Object Oriented Programs
Data Speculation for Instruction-Level Parallel Processing Systems
21st Annual International Symposium on Computer Architecture, Chicago, Illinois
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