Parallel Architecture: Design, Validation, Implementation

该项目是一个研究的理论方面的方案， 设计周期为一个特殊的流派并行架构，即， 相同处理元件的多用途阵列（用于 短）。 该计划的第一阶段将关注的问题 关于数组的设计，集中在有关的问题， 相对计算效率的提高， 的结构特征融入设计中。 举个例子， 点对点通信与通信的相对优点 通过共享存储器与通过（可重新配置的）总线通信？ 的 这一阶段的主要任务是研究相互模拟性 的建筑。 该计划的第二阶段将集中于 验证一个建议的多用途架构的问题， 展示了它处理各种类型的 高效的计算任务。 主要的交通工具将是一辆 并行逻辑映射问题的增强版 建筑 该计划的最后阶段将涉及 拟议架构的物理实现，重点是 容错和有效实施等问题， 物理空间 这一阶段的一个主要工具将是 并行架构的物理映射问题。自始至终， 我们对效率的衡量将包括延迟，资源利用， 和负载平衡;而且，我们将考虑各种模式， 并行计算，将SIMD和MIMD视为 模式谱。

This project is a program of research on theoretical aspects of the design cycle for a special genre parallel architectures, namely, multipurpose arrays of identical processing elements (arrays, for short). The first phase of the program will concern itself with issues concerning the design of arrays, concentrating on questions concerning the relative computational efficiency gained by incorporating a variety of structural features into the design. As but one example, what are the relative merits of point to point communication vs. communication via shared memories vs. communication via (reconfigurable) busses? The main vehicle for this phase will be studies of the intersimulatability of architectures. The second phase of the program will concentrate on the problem of validating a proposed multipurpose architecture by demonstrating its ability to handle a variety of classes of computational tasks efficiently. The main vehicle for this will be an enhanced version of the logical mapping problem for parallel architectures. The final phase of the program will be concerned with the physical implementation of the proposed architecture, focusing on issues such as fault-tolerance and efficient implementability in physical space. One major tool in this phase will be the new notion of the physical mapping problem for parallel architectures. Throughout, our measures of efficiency will include delay, resource utilization, and load balancing; and, we shall consider a variety of modes of parallel computation, viewing SIMD and MIMD as the extremes in the spectrum of modes.