Control and Layout Issues in Performance-Driven, High- Level Synthesis

庞格勒 本研究主要针对高阶综合中的两个问题：控制与资料路径综合，以及两者间的取舍如何影响超大规模积体电路设计的布局与效能。 首先是基于在控制/数据流图上执行的高级转换来找到控制/数据路径折衷。 第二是将布局考虑纳入数据路径连接的生成。 一种新的数据路径生成方案，旨在产生更好的性能和布局特性的数据路径正在开发中。 这项研究是在Keystone系统的基本框架内进行的，该系统自动合成和模拟所有的数据路径组件、控制逻辑和路由。

Pangrle This research is focused on two problems of high level synthesis, control and datapath synthesis, and how the tradeoffs between the two affect layout and performance of VLSI designs. First is finding control/datapath tradeoffs based on high-level transformations performed on the control/data flow graph. Second is incorporation of layout considerations into the generation of the datapath connectivity. A new data path generation scheme that aims at producing datapaths with better performance and layout characteristics is being developed. This research is being performed within the basic framework of the Keystone System which automatically synthesizes and simulates all of the datapath components, the control logic, and the routing.