Functionality and Burn-in Effectiveness

9400051郭这笔赠款通过系统老化来支持微电子电路可靠性设计的研究，这可以消除元件和子系统老化后遗留的许多剩余缺陷。老化技术被广泛应用于集成电路(IC)以提高可靠性。然而，复杂的系统配置往往使制定最佳老化策略变得困难。这项研究将讨论使用非参数设计方法和广义Dirichlet过程来确定系统燃烧时间。此外，它还将考虑降低系统可靠性并影响组件和子系统老化的最佳老化策略的不兼容性的影响。如果成功，这项研究将为系统设计人员提供一种方法，以便在设计阶段(1)确定新IC的最佳老化策略，(2)在元件、子系统和系统级别找到最佳老化时间，(3)通过使用IC制造商提供的现场故障数据实施最佳老化策略，以及(4)更好地了解新IC的失效机制，使其能够在制造过程中提高可靠性和质量。这些进展有助于提高美国集成电路产业的竞争力。

9400051 Kuo This grant provides support for research on microelectronic circuit design for reliability by means of system burn-in, which can remove many of the residual defects remaining after component and subsystem burn-in. Burn-in techniques are widely applied to integrated circuits (ICs) to enhance reliability. However, complex system configurations often make it difficult to formulate optimal burn-in strategies. This research will address the use of a non-parametric design approach and the generalized Dirichlet process to determine system burn-time. In addition, it will consider the impact of incompatibility that reduces system reliability and that affects the optimal burn-in strategy for both component and subsystem burn-in. If successful, this research will provide an approach, at the design stage, for system designers to (1) determine the optimal burn-in strategy for new ICs, (2) find the optimal burn-in times at the component, subsystem, and system levels, (3) implement the optimal burn-in strategy by using the field failure data available from IC manufacturers, and (4) better understand the failure mechanisms of new ICs, enabling improvement of their reliability and quality in the manufacturing process. These advances could help to improve competitiveness of the United States IC industry.