Experimenting with Concurrent Multithreaded Architectures for High-Performance Computing

本文主要研究并发多线程体系结构的编译器和体系结构问题。这些体系结构允许多个线程同时处于活动状态，从而在单个机器周期内实现多个指令发布。体系结构研究侧重于线程执行单元的设计，其中包括对线程间通信、推测线程执行和线程流水线的支持。功能层面和语域迁移层面的模拟将是本研究的主要工具。编译器的研究重点是线程和指令级并行性的综合优化。这项研究将在对GCC编译器进行修改的背景下进行。虽然可以使用线程来允许多个独立的程序并发执行，但该项目的主要关注点是加速单个程序的执行。

This research focuses on the compiler and architectural issues of concurrent multithreaded architectures. These architectures allow multiple threads to be active simultaneously to achieve multiple instruction issue in a single machine cycle. The architectural research focuses on the design of thread execution units that include support for communication between threads, for speculative thread execution, and for thread pipelining. Simulation at the functional and register-transfer levels will be the primary tool for this research. The compiler research focuses on integrating optimization for thread and instruction level parallelism. This research will take place in the context of modifications to the gcc compiler. While threads can be used to allow multiple independent programs to execute concurrently, the primary focus of this project is speeding up the execution of a single program.