Co-Analysis and Co-Synthesis of High-Performance DistributedEmbedded Systems

专用嵌入式计算系统的设计是作为硬件/软件协同设计来完成的，以共同优化硬件平台和在该平台上执行的软件。 本研究探讨嵌入式电脑系统协同分析的两个方面：记忆体系统与敏感度分析。 目的是获得指导综合决策的协同综合分析方法. 嵌入式计算机具有分层存储器系统，具有高速缓存以保持处理器忙碌。 由于这些系统通常是实时的，因此即使存在缓存以保持处理器忙碌，软件也必须执行到性能界限。 目前正在研究在存在高速缓存的情况下寻找执行时间界限的模型，并有效地利用现有的硬件。 此外，协同综合算法需要分析系统对组件特性的敏感性。 敏感性分析可以告诉系统性能随着组件执行速度的变化而变化的程度。 目前正在探索可用于共合成内部循环以帮助指导优化选择的敏感性措施。 目前正在共同综合算法的范围内评价共同分析方法。

The design of application-specific embedded computing systems is done as hardware/software co-design to jointly optimize the hardware platform and software executing on that platform. This research is investigating two aspects of the co-analysis of embedded computing systems: memory systems and sensitivity analysis. The goal is to obtain co- synthesis analysis methods which can guide synthesis decisions. Embedded computers have hierarchical memory systems with caching to keep the processors busy. Since these systems are often real-time, the software must execute to performance bounds even in the presence of caching to keep the processors busy. Models for finding bounds on execution time in the presence of caches, and make effective use of available hardware, are being studied. Also, co- synthesis algorithms need to analyze the sensitivity of the system to the characteristics of the components. Sensitivity analysis can tell how much system performance changes as the execution speed of a component changes. Sensitivity measures, which can be used in the inner loop of co-synthesis to help guide optimization choices, are being explored. The co-analysis methods are being evaluated in the context of co-synthesis algorithms.