Collaborative Research: Fast Hardware Encryption

摘要：高速、大容量的加密系统将成为未来十年视频、无线和计算机通信安全的基础。本研究涉及到此类系统的设计和开发，特别是基于硬件的流密码系统的设计和开发。高速基于硬件的流密码可以很容易地制造、编程和实现。它们可用于实时加密数据（如语音或视频），并被用作蜂窝电话、GPS卫星、雷达和无线电系统中的嵌入式组件。然而，大多数流密码被发现容易受到各种密码分析攻击。本研究涉及开发和分析序列生成器的新架构，该架构具有上述所有优点，但比传统架构更安全。它们也可能用于各种其他应用，如声纳系统和蒙特卡罗集成。线性反馈移位寄存器已被证明对高速通信的伪随机序列的生成特别有用。它们已经被深入研究了四十多年，它们的用途似乎没有任何终结的迹象。最近发现了一种全新的反馈移位寄存器结构，即所谓的带进位的反馈移位寄存器（FCSR）。该体系结构具有线性反馈体系结构的所有优点，如高速和易于实现，并显着扩展了易于生成和有用的序列的类别。本研究涉及许多新架构的实现问题，包括：(1)开发用于高速生成伪随机序列的并行电路，(2)设计组合器和前馈函数以提高FCSR序列的安全性，(3)设计时钟控制的FCSR电路，以及(4)分析以这种方式生成的FCSR序列的加密安全性。

Abstract:High speed, high volume cryptographic systems willform the basis for the security of video, wireless,and computer communications of the next decade. Thisresearch involves the design and development of suchsystems, especially that of hardware-based streamciphers. High speed hardware-based stream ciphers canbe easily manufactured, programmed, and implemented.They can be used to encrypt data (such as voice orvideo) in real time and are used as embeddedcomponents in cellular telephones, GPS satellites,radar, and radio systems. Most stream ciphers,however, have been found to be vulnerable to variouscryptoanalytic attacks. This research involves thedevelopment and analysis of new architectures forsequence generators which have all the aboveadvantages but which are much more secure thantraditional architectures. They are also potentiallyuseful for a variety of other applications such assonar systems and Monte Carlo integration.Linear feedback shift registers have proven especiallyuseful for the generation of pseudorandom sequencesfor high speed communications. They have beenintensively studied for over forty years and theirusefulness does not appear to have any end in sight.Recently a fundamentally new architecture for feedbackshift registers was discovered, the so-calledfeedback-with-carry shift register or FCSR. Thisarchitecture shares all the advantages of the linearfeedback architecture such as high speed and ease ofimplementation and significantly expands the class ofeasily generated and useful sequences. This researchinvolves a number of implementation issues for the newarchitecture including (1) the development of parallelcircuitry for high speed generation of pseudorandomsequences, (2) the design of combiners and feedforwardfunctions to increase the security of FCSR sequences, (3) the design of clock-controlled FCSR circuits, and (4) the analysis of the cryptographic security of the FCSR sequences which are generated in this way.