Increasing Parallel Program Performance with the LC Memory Consistency Model

这项研究以灵活的内存一致性观点，向支持和评估编译器优化在显式并行程序中的单处理器性能的应用迈出了重要的一步。针对两个重要的悬而未决的问题：(1)在共享存储并行程序的编译分析和优化的新发展中，位置一致性(LC)内存模型与顺序一致性(SC)派生的模型相比，可以获得什么样的性能？(2)作为两种不同方法的折衷，SC派生的模型和LC模型是否可以在同一程序中同时支持，通过开发编译器技术支持的程序员控制的内存一致性策略，结果将包括：(1)基于LC模型的编程模型的描述和实现，并对其可编程性进行研究；(2)编译分析以维护程序员控制的内存一致性，以便程序员可以在同一应用程序的不同部分中选择内存模型；(3)在软件缓存环境中基于LC模型开发和改进缓存一致性协议；(4)在不同的内存一致性模型和缓存协议下对编译器优化和程序性能进行实验评估。

This research takes a significant step towards enabling and evaluating the application of compileroptimizations for uniprocessor performance within explicitly parallel programs, with a flexible viewof memory consistency. Two important unanswered questions are targeted: (1) What kind of performance can be gained with the Location Consistency (LC) memory model in comparisonto the sequential consistency (SC)-derived models for shared memory parallel programs,amidst the new developments of compiler analysis and optimization for SC-derived models?(2) As a compromise between the two divergent approaches, can both the SC-derived models and the LC model be supported within the same program, by developing a programmer-controlled memory consistency strategysupported by compiler technology?The resultswill include:(1) specification and implemenation of a programming model that assumes an end-to-end view of the memory system based on the LC model, and a study of its programmability,(2) compilation analyses to uphold programmer-controlled memory consistency so programmers can choose between the memory models in different parts of the same application,(3) development and refinement of cache consistency protocols based on the LC model in a software caching context,(4) experimental evaluation of compiler optimization and program performance underdifferent memory consistency models and cache protocols.