Information Encoding for Energy Efficient Processor Design

本项目研究信息编码技术在降低各种处理器组件能耗方面的作用，这些组件包括读取机制、片上指令和数据高速缓存、功能单元、指令发布逻辑和CPU I/O引脚。为了解决上述所有处理器组件的能耗问题，本项目将研究三种不同类型的编码。数据编码将用于减少数据驻留的数据高速缓存和通过其传输数据的外部数据总线I/O引脚中的活动。XScale处理器中可用的32位ARM ISA和16位Thumb ISA形式的指令编码将用于生成可提供高性能的紧凑代码。最后，编译器或分析器生成的提示将被编码到生成的代码中，以节流处理器的能源消耗。

This project investigates the role of information encoding techniques for reducing energy consumed by various processor components including the fetch mechanism, on-chip instruction and data caches, functional units, instruction issue logic, and CPU I/O pins. To address energy consumption by all of the above processor components, three distinct types of encodings will be investigated in this project. Data encoding will be used to reduce the activity in data caches where the data resides and external data bus I/O pins over which data is transmitted. Instruction encodings in form of 32 bit ARM ISA and 16 bit Thumb ISA available in the XScale processor will be used to generate compact code which gives high performance. Finally, compiler or profiler generated hints will be encoded into the generated code to throttle the energy consumption of a processor.