Optimizing Computer Design Using Knowledge of Inter-Operation Value Communication

利用互操作价值沟通的知识优化计算机设计本项目将研究微处理器中优化价值沟通的新方法。 目的是改进当前的价值观沟通机制，这些机制通常不知道正在沟通的价值观的沟通要求。 研究人员建议开发和研究新的值通信机制，这些机制针对特定值的通信行为进行了优化，目的是大大提高处理器性能。研究将有两个主题。 第一个主题将是发展预测技术，以了解价值观的沟通要求。第二个主题将是开发技术，利用知识的价值观的沟通要求，以优化其沟通。 具体的研究方案包括寄存器文件、旁路网络、动态调度窗口、加载-存储队列和该高速缓存层次的优化。 研究人员将使用各种各样的基准程序，包括标准基准套件以及其他程序，包括商业工作负载，用许多不同的编程语言编写。

Optimizing Computer Design Using Knowledge of Inter-Operation Value CommunicationThis project will investigate novel ways of optimizing value communication in microprocessors. The objective is to improve upon current value communication mechanisms that are typically agnostic of the communication requirements of the values being communicated. The researchers propose to develop and investigate novel value communication mechanisms that are optimized for the communication behavior of specific values, with the aim of greatly increasing processor performance.The research will consider register and memory values in microprocessors. There will be two main themes in the research. The first theme will be to develop predictive techniques to learn about the communication requirements of values. The second theme will be to develop techniques that use knowledge of a value's communication requirements to optimize its communication. Specific schemes that will be investigated include optimizations to the register file, bypass network, dynamic scheduling window, load-store queue, and the cache hierarchy.The research methodology will make extensive use of simulations using cycle-level simulators. The investigators will use a wide variety of benchmark programs including standard benchmark suites as well as other programs, including commercial workloads, written in a number of different programming languages.