Studies in Instruction-Level Parallel Processing

本研究主要探讨指令级平行处理器。 目标是开发处理器，在执行任意非数值应用程序（如编译器、模拟器、CAD、文本处理和数据库程序）时，每个周期可以支持10条以上的指令。 本研究在前人研究的基础上，进一步拓展了ILP处理器的研究基础。一种新的ILP处理器的范例，多标量处理范例，继续被开发，目标是将多标量范例纳入处理器设计的主流。 多标量处理器的操作，如数据存储器系统，指令存储器系统，操作间的通信机制，以及任务的规范和执行的相关问题，使用详细的仿真模型进行了研究。 还调查了多标量处理器的软件支持。

This research investigates instruction-level parallel (ILP) processors. The goal is to develop processors that can sustain over 10 instructions per cycle when executing arbitrary non-numeric applications such as compilers, simulators, CAD, text processing, and database programs. The research builds on the previous studies of ILP to expand the foundation for ILP processors. A novel paradigm for ILP processors, the multiscalar processing paradigm, continues to be developed, with the goal of bringing the multiscalar paradigm into the mainstream of processor design. Issues relevant to the operation of a multiscalar processor such as data memory systems, instruction memory systems, inter-operation communication mechanisms, and task specification and execution, are studied using detailed simulation models. Also investigated is software support for multiscalar processors.