课题基金 / 基金详情

NER: Automatic Placement Algorithms for Quantum-dot Cellular Automata

NER: Automatic Placement Algorithms for Quantum-dot Cellular Automata
NER:量子点元胞自动机的自动放置算法
批准号:
0404011
负责人:
Sung Lim
金额:
$7.42万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-08-01 至 2006-07-31

项目摘要

项目成果

Sung Lim的其他基金

相似基金

相关文献

中文摘要
翻译
提案编号:0404011参考:GA Tech res Corp-GITPRINCIPAL研究员:LIM,SungTITLE:NER:用于量子点细胞自动机的自动布局算法摘要:量子点细胞自动机(QCA)是一种革命性的计算范例,非常适合于纳米电子的实现和分子维度的缩放。在QCA中,二进制信息被编码在构成单元的一组点中的单电子的位置。在QCA中,电子在细胞内的量子点之间交换,但细胞之间没有电流流动。这导致极低的功耗,并避免了最终限制晶体管电路集成密度的发热问题。QCA已经超越了理论和实验工作的领域--基本的QCA器件和逻辑元件都是用金属建造的。我们的目标是开发第一个物理设计自动化工具集,帮助在QCA中生成计算有趣但可实现的电路,并显著扩展QCA现有的系统级基础设施。我们利用我们与致力于制造真正的QCA设备的物理学家的关系。在这种相互作用的基础上,形成了一组近期可构造性约束:本质上是物理学家认为在近期可实现的逻辑结构的列表。直到最近,大多数设计优化都是手工完成的。我们现在打算使用CAD,特别是物理布局自动化,来解决所有可能阻碍QCA中可构建点的设计的不良功能。最终结果应该是计算上有趣的任务的扩展子集,这些任务可以在给定的可构造点的约束内完成。随着最先进的物理科学的发展,计算机辅助设计也将被用来预测可能发生的事情。我们的QCA布局是QCA物理设计自动化的第一步,分为区域划分、区域布局和单元布局步骤。分区的目的是最初对给定电路进行分区,使得单个时钟电势调制每个分区内所有QCA单元的点间势垒。分区放置步骤将一组分区作为输入;每个分区将被分配一个时钟标签,以确保QCA信号在适当的时间到达适当的位置。区域布局的输出是在二维芯片区域上排列区域的最佳布局。最后,单元布局将访问每个区域,并确定各个QCA逻辑门的理想位置。
英文摘要
PROPOSAL NO: 0404011INSTITUTION: GA Tech Res Corp - GITPRINCIPAL INVESTIGATOR: Lim , SungTITLE: NER: Automatic Placement Algorithms for Quantum-dot Cellular AutomataAbstract:Quantum-dot cellular automata (QCA) is a revolutionary computing paradigm well suited to nano-electronic implementation and scaling to molecular dimensions. In QCA, binary information is encoded in the position of single electrons among a group of dots forming a cell. In QCA, electrons switch between quantum dots within a cell, but no current flows between cells. This leads to extremely low power dissipation and avoids the problem of heat generation that ultimately limits the integration density of transistor circuits. QCA has moved beyond the realm of theory and experimental work-basic QCA devices and logic elements have all been constructed in metal. Our goal is then to develop the first physical design automation toolset that will help to generate computationally interesting, yet implementable circuits in QCA, and significantly expand QCA's existing systems-level infrastructure. We leverage our ties to physical scientists who are working to build real QCA devices. Based upon this interaction, a set of near-term buildability constraints has evolved: essentially a list of logical constructs that are viewed as implementable by physical scientists in the nearer-term. Until recently, most of the design optimizations have been done by hand. Then these initial attempts to automate the process of removing a single, undesirable, and unimplementable feature from a design were quite successful.We now intend to use CAD, especially physical layout automation, to address all undesirable features of design that could hinder movement toward a buildability point in QCA. The net result should be an expanded subset of computationally interesting tasks that can be accomplished within the constraints of a given buildability point. CAD will also be used to project what is possible as the state-of-the-art in physical science expands. Our QCA placement, the first step in QCA physical design automation, is divided into zone partitioning, zone placement, and cell placement steps. The purpose of zone partitioning is to initially partition a given circuit such that a single clock potential modulates the inter-dot barriers of all QCA cells within each zone. The zone placement step takes as input a set of zones; each zone will have been assigned a clocking label that will ensure QCA signals arrive at the proper place at the proper time. The output of zone placement is the best possible layout for arranging the zones on a two dimensional chip area. Finally, cell placement will visit each zone and determine ideal locations for individual QCA logic gates.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
SHF:Small:Device/Circuit Co-design of Negative Capacitance Transistors
  • 批准号:
    1718671
  • 项目类别:
    Standard Grant
  • 资助金额:
    $45.0万
  • 财政年份:
    2017
  • 负责人:
    Sung Lim
  • 依托单位:
SHF: Small: Collaborative Research: Design for Manufacturability of 3D ICs with Through Silicon Vias
  • 批准号:
    1018216
  • 项目类别:
    Standard Grant
  • 资助金额:
    $20.0万
  • 财政年份:
    2010
  • 负责人:
    Sung Lim
  • 依托单位:
SHF: Small: 3D Integration of Sub-Threshold Multi-core Co-processor for Ultra Lower Power Computing
  • 批准号:
    0917000
  • 项目类别:
    Standard Grant
  • 资助金额:
    $45.0万
  • 财政年份:
    2009
  • 负责人:
    Sung Lim
  • 依托单位:
CAREER: Physical Design Automation for Fast and Reliable 3D Circuits
  • 批准号:
    0546382
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $40.0万
  • 财政年份:
    2006
  • 负责人:
    Sung Lim
  • 依托单位:
海外基金