NIRT: Atom-Scale Silicon Integrated Circuits for Quantum Computation
NIRT: Atom-Scale Silicon Integrated Circuits for Quantum Computation
批准号:
0404208
负责人:
Tsung-Cheng Shen
金额:
$130.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-08-01 至 2009-07-31
中文摘要
提案编号:0404208PI:沈宗成题:用于量子计算的原子规模硅集成电路摘要:随着每个电子器件的尺寸减小和器件密度的增加,能源效率是将摩尔定律扩展到22 nm技术节点之外的日益严峻的挑战之一。解决这个问题的一种方法是使用单电子晶体管(SET)来执行逻辑运算。然而,电视机的敏感性也使它们容易受到附近任何电荷缺陷的影响。因此,很难将SET与其余常规硅器件集成在一起。在这个项目中,我们计划通过在硅晶体中对二维磷掺杂原子进行图案化来制造原子规模的外延器件。由于SET的隧道带隙是由晶体硅构成的,因此可以消除困扰传统金属基SET的电荷和噪声问题。此外,至少在少数情况下,量子计算算法已被证明比经典信息处理快几个数量级。这些集合对于读出存储在量子比特(Qbit)中的信息是必不可少的。该项目的最终研究目标是建立所有必要的组件,磷施主阵列,集成SET读出,门的大小和频率的比例,以演示一个原型量子信息过程。该项目的教育目标是为研究生、本科生和博士后提供与顶尖科学家合作的机会,并使用来自全国各地的最佳研究工具和专业知识。他们的教育机会将从原子尺度的材料和设备物理到世界级的光刻、栅电介质和纳米加工。
英文摘要
Proposal No : 0404208PI: Shen, Tsung-ChengTitle: Atom-Scale Silicon Integrated Circuits for Quantum ComputationAbstract: As the dimensions of each electronic device decrease and the density of devices increases, energy efficiency is one of the mounting challenges to extend Moore's law beyond 22 nm technology node. One way to address this issue is to employ single electron transistors (SETs) to perform logic operations. However, the sensitivity of the SETs also makes them susceptible to any charge defect nearby. As a result, it is very difficult to integrate SETs with the rest of the conventional silicon devices. In this project, we plan to fabricate atom-scale epitaxial SETs by patterning two-dimensional phosphorous dopant atoms inside a silicon crystal. Since the tunneling gap of the SET is of crystalline silicon, charge and noise problems plaguing the conventional metal-based SET could be eliminated. In addition, quantum computation algorithms have proven to be orders of magnitude faster than the classical information processing, at least in a few cases. The SETs are essential to read out the information stored in quantum bits (qbit). The ultimate research goal of this project is to establish all the necessary components, phosphorous donor arrays, integrated SET readout, gates scaled in size and frequency, to demonstrate a prototype quantum information process. The educational goal of this project is to provide an opportunity for graduate and undergraduate students and post docs, to work with top scientists and use the best research tools and expertise assembled from across the country. Their educational opportunities will range from atom-scale materials and device physics to world-class lithography, gate dielectrics, and nanoprocessing.
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