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Quilt Packaging: A New Paradigm for the Integration of Heterogeneous Communications Systems-in-Package [UND_FY05_009]

Quilt Packaging: A New Paradigm for the Integration of Heterogeneous Communications Systems-in-Package [UND_FY05_009]
Quilt 封装:异构通信系统封装集成的新范式 [UND_FY05_009]
批准号:
0515392
负责人:
Gary Bernstein
金额:
$27.58万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2005
资助国家:
美国
项目状态:
已结题
起止时间:
2005-07-01 至 2007-06-30

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中文摘要
翻译
PROPOSAL NO:0515392 PI:Gary Bernstein Inst:圣母大学标题:被子封装:集成异类通信系统的新范例-封装中芯片到芯片通信是集成系统吞吐量的瓶颈。有几家公司已经开发了自己的技术来增加IC之间的信号带宽,包括IBM、Sun MicroSystems和SiliconTube。PIS似乎开发了一种独特的互连IC的方法,与行业正在开发的方法相比,这种方法将产生几个重要的好处。这种方法是一种微机械加工技术,可以产生数百或数千个从IC芯片侧面突出的小金属结节,使IC能够连接(焊接或焊接)在一起形成一床“被子”的芯片,这样信号在IC之间以非常高的速度传输,而功耗可以忽略不计。这项技术在方案中被称为被子封装(QP),除了速度和性能的提高(预计至少为150 GHz)外,还可以通过取消IC中目前使用的大多数高功率焊盘驱动器来降低系统的功耗。电路的这种减少将减少芯片的占地面积,导致更低的IC成本和更高的成品率。此外,由于几个QP连接的IC将驻留在一个封装中,因此IC封装的总数将减少,从而实现更低的系统成本、更小的尺寸和更轻的重量。这些属性可能会对军事、空间和商业手持系统产生重要影响。棉被包装的另一个重要特点是在棉被中使用不同种类的材料作为面板。这可能会导致用于光、射频或数字通信应用的全新的集成式系统。此外,在棉被包装出现之前不可能出现的新建筑将成为可能。PI已经演示了一种简单的QP工艺,并制作了带有突出结节的模具。他们目前正在设计微波试验台,以演示预测的高频特性。这项提案要求资金在该工艺中取得进一步进展,执行先进的高频测量,并展示带有四分之一微米环形振荡器的真实硅IC,该振荡器包含QP结,以便信号在每个阶段之间的两个相连IC之间跳跃。
英文摘要
ABSTRACTPROPOSAL NO: 0515392 PI: Gary Bernstein INST: University of Notre Dame TITLE: Quilt Packaging: A New Paradigm for the Integration of Heterogeneous Communications Systems-in-Package Chip-to-chip communications is a bottleneck for integrated systems throughput. Several companies have developed their own technology for increasing the signal bandwidth between ICs, including IBM, Sun Microsystems, and SiliconPipe. The PIs paln to developed a unique method of interconnecting ICs that will result in several important benefits compared with those under development by industry. The approach is a micromachining technique resulting in hundreds or thousands of small metal nodules that protrude out from the sides of IC die, allowing ICs to be connected (soldered or welded) together to form a "quilt" of die, such that signals traverse between the ICs at very high speeds and with negligible power dissipation. The technique has been called Quilt Packaging (QP) in the proposal.Besides the increase in speed and performance (predicted to be at least 150 GHz), power dissipation of systems can be reduced by eliminating most of the high-power pad drivers currently in use in ICs. This same reduction in circuitry will decrease the chip real-estate, resulting in lower-cost ICs and higher yields. Additionally, since several QP-connected ICs will reside in one package, the total number of IC packages will be reduced resulting in lower system cost, smaller size, and lower weight. These attributes may have an important impact on military, space, and commercial hand-held systems. One more important feature of Quilt Packaging is the use of heterogeneous materials as panels in the quilt. This may lead to entirely new systems-in-package for optical, RF, or digital communications applications. Additionally, newarchitectures not possible prior to the advent of Quilt Packaging will be made possible. The PIs have already demonstrated a simple QP process, and have made die with protruding nodules. They are currently in the process of designing microwave test beds to demonstrate the predicted high-frequency characteristics. This proposal requests funds to make further advances in the process, perform advanced high-frequency measurements, and demonstrate real silicon ICs with quarter-micron ring oscillators that incorporate QP nodules such that the signals jump between two connected ICs between each stage.
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Collaborative Research: A gravitational inventory of the solar system using high precision minor planet astrometry
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海外基金