Multi-wire Signaling for Chip-to-Chip Electrical Communications

ecs - 0621733。一种基于码分多址（CDMA）原理的正交四线信令技术将被开发用于芯片对芯片的电子通信。与传统的差分信号相比，该技术实现了每条线50%以上的总数据带宽。它可以推广到更高的线（和引脚）利用率和更好的电磁串扰抑制，从而实现未来的多tb /秒链路。作为概念验证，将在数字CMOS工艺中构建一个18gb /s的原型片对片接口，通过四条6”FR4走线。拟议的预算已被修改，以支持两名研究生，而不是一名；PI夏季支持和原型制造和测试成本已经降低。修改不改变项目的技术范围；但原型机将采用130纳米（而不是90纳米）CMOS制造，以抵消制造成本。这项研究的智力价值在于它提出了一种不同的方法来改善芯片对芯片的通信。它认识到，由于不可避免的电磁串扰和元件误差，一束不同的导线、封装引脚、路由过孔等是Gb/s数据速率下的共享介质，允许应用完善的通信理论原理（如CDMA）来增加总数据带宽并抑制串扰。该项目的广泛影响有两个方面：首先，它解决了芯片对芯片通信的瓶颈，这对电子行业的增长至关重要；其次，通过在电路设计、信号处理和通信理论之间的基本相互作用方面的培训，它将更好地为未来的工程师做好准备。

ECS-0621733S. Pamarti, UCLA An orthogonal four-wire signaling technique based on Code Division Multiple Access(CDMA) principles will be developed for chip-to-chip electrical communications. The technique achieves 50% more aggregate data bandwidth per wire than conventional differential signaling. It can be generalized to higher wire (and pin) utilization and better electromagnetic crosstalk suppression, enabling future multi-terabytes/second links. An 18 Gb/s prototype chip-to-chip interface over four 6" FR4 traces will be built in a digital CMOS process as a proof of concept. The proposed budget has been revised to support two graduate students instead of one; PI summer support and prototype fabrication and testing costs have been reduced. The revision does not alter the technical scope of the project; but the prototype would be built in 130nm (instead of 90nm) CMOS to offset fabrication costs.The intellectual merit of the research is that it presents a different approach to improving chip-to-chip communications. It recognizes that a bundle of distinct wires, package pins, routing vias etc. is a shared medium at Gb/s data rates owing to inevitable electromagnetic crosstalk and component errors, allowing the application of well established communication theoretic principles such as CDMA to increase the aggregate data bandwidth and suppress crosstalk.The broader impacts of the project are two fold: first, it addresses the chip-to-chip communication bottleneck, crucial to the growth of the electronics industry; second, it will better prepare future engineers by training them in the fundamental interplay between circuit design, signal processing, and communication theory.