Collaborative Research: CT-T: Manufacturing Variability-based Hardware Protection Techniques
Collaborative Research: CT-T: Manufacturing Variability-based Hardware Protection Techniques
批准号:
0716443
负责人:
John Lach
金额:
$5.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-10-01 至 2008-09-30
中文摘要
据估计,与软件盗版成本相比,硬件(HW)知识产权盗版导致的损失几乎高出一个数量级,并极大地促进了软件和娱乐数据盗版。此外,硬件漏洞可被用于安全攻击,特别是由于业务模型转移到外部铸造厂和组装厂而导致的硬件恶意软件攻击(恶意或无意更改设计规范,损害特定条件下功能的正确性)的威胁日益增加。该项目的战略目标是通过多管齐下的攻击推动针对硬件恶意软件攻击和盗版的研究,包括开发概念基础和几种实用的硬件保护技术。该项目的智力优势是开发硬件保护技术,利用现代制造工艺中固有的制造变异性(MV)和由此产生的每个已制造集成电路(IC)的独特性。该项目正在开发:(I)在关于MV的非常温和的统计假设下仅考虑单个IC的硬件恶意软件检测技术,以及(Ii)主动硬件计量协议,该协议通过将MV集成到目标设计的功能中来防止代工厂分发未经授权的设计副本,从而使得只有设计者可以在加电后发布密钥来解锁设计,从而使其成为功能。该项目的更广泛的影响是,它将形成一个新的行业的基础,以确保复杂的水平IC商业模型中的硬件完整性。此外,该项目使本科生和研究生接触到这些日益重要的主题,并为代表性不足的学生提供研究机会。
英文摘要
It is estimated that hardware (HW) intellectual property piracy induces almost an order of magnitude higher loss when compared to software piracy cost and greatly facilitates both software and entertainment data piracy. In addition, HW vulnerabilities can be exploited for security attacks, especially the increasing threat of HW malware attacks (malicious or unintentional alterations of design specifications that compromise the correctness of the functionality under specific conditions) due to business models moving to external foundries and assembly houses. The strategic objective of this project is to give impetus to research on the protection against HW malware attacks and piracy with a multi-pronged attack that includes the development of both the conceptual foundation and several practical HW protection techniques.The intellectual merit of this project is the development of HW protection techniques that leverage the manufacturing variability (MV) inherent in modern fabrication processes and the resulting uniqueness of every manufactured integrated circuit (IC). This project is developing: (i) HW malware detection techniques considering only a single IC under very mild statistical assumptions about MV, and (ii) active HW metering protocols that prevent foundries from distributing unauthorized design copies by integrating MV into the functionality of the targeted design in such a way that only the designer can issue a key that unlocks the design after power up so that it becomes functional.The broader impacts of this project are that it will form the basis for a new industry that ensures HW integrity in a complex horizontal IC business model. In addition, this project is exposing both undergraduate and graduate students to these increasingly important topics and providing research opportunities for underrepresented students.
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