EHS: Highly Flexible Multi-Mode Embedded Systems
EHS: Highly Flexible Multi-Mode Embedded Systems
批准号:
0410526
负责人:
John Lach
金额:
$30.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-09-01 至 2008-08-31
中文摘要
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英文摘要
Lach - AbstractA challenging aspect of embedded system design is hardware/software partitioning. Many system tasks may be performance-sensitive, but hardware implementation of all such tasks may be prohibitively expensive. In addition, hardware implementation of tasks that are performance-sensitive but rarely executed results in low resource utilization. Multi-mode systems have emerged as an area-efficient solution to this problem, implementing multiple time-wise mutually exclusive performance-sensitive tasks in a single hardware space. To execute a particular task, the hardware is configured to the appropriate mode. However, existing multi-mode techniques have limited reconfigurability, as only the datapath interconnect can be changed and only from mode-to-mode.This project is developing a highly flexible multi-mode embedded system design technique that enables inter- and intra-mode reconfiguration of datapath components and control structures as well as interconnect. This added flexibility results in significant area and power savings over existing multi-mode techniques. The hardware flexibility is efficiently obtained via a new small-scale reconfigurability (SSR) design technique, which integrates small amounts of reconfigurable logic and interconnect into primarily fixed logic circuits, thus avoiding the area, delay, and power penalties associated with general-purpose reconfigurable fabric The design paradigm provided by these techniques requires a reevaluation of hardware/software partitioning in embedded systems, as the cost model associated with hardware implementation changes significantly.This project contains three primary components. First is the development of multi-mode system synthesis techniques that leverage the extra hardware flexibility provided by reconfigurable datapath components and controllers and intra-mode reconfigurability. The goal is a generic system synthesis algorithmic framework (including scheduling, allocation, and binding algorithms) that is applicable to a variety of embedded system applications. Second is the development of SSR as a hardware implementation technique for flexible datapath components and controllers. Third is exploring the effect this new design paradigm has on hardware/software partitioning in embedded system desig
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海外基金