CAREER: Rotary Clock Technology Integration
CAREER: Rotary Clock Technology Integration
批准号:
0845270
负责人:
Baris Taskin
金额:
$40.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-15 至 2014-08-31
中文摘要
“该奖项是根据2009年美国复苏和再投资法案(公法111-5)资助的。“实现高质量的同步与低功耗是一个主要目标,在同步VLSI电路设计在高频制度。 为了满足这一目标,传统的时钟设计方法正在不断改进。 此外,传统时钟的下一代替代品已经出现。 谐振时钟技术提供的工作频率和功耗水平在最先进的体CMOS VLSI IC实现中是前所未有的。 这些技术必须针对片上变化进行表征,具有强大的仿真模型,并得到特定设计流程的支持,以便在大批量生产中可行。 该项目旨在解决大批量IC生产中谐振旋转时钟技术的设计和设计自动化方面的挑战。通过改进的纳米级设计特性和设计自动化方法,旋转时钟技术可以无缝集成到主流VLSI IC设计流程中。 所提出的研究的更广泛的影响是在革命性的时钟同步方法的数字VLSI同步电路的低功耗,多GHz的操作,并提供其可持续性的半导体技术缩放。 拟议的低功耗、多GHz高性能时钟操作将对所有微电子系统产生重大影响,从可现场部署的低功耗传感器到世界上最快的超级计算机。 研究成果将通过一个维基网站和一本书传播。 另一个重要的教育影响是将纳米计算和技术概念纳入计算机工程课程。 计划为高中学生举办一个计算讲习班,作为费城市区正在进行的推广项目的一个组成部分。
英文摘要
"This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."Achieving high quality synchronization with low power dissipation is a major objective in synchronous VLSI circuit design at high frequency regimes. In order to meet this objective, conventional clock design methodologies are constantly being improved. Also, next-generation alternatives to conventional clocking have been emerging. Resonant clocking technologies provide operating frequencies and power dissipation levels that are unprecedented in the state-of-the-art, bulk-CMOS VLSI IC implementations. These technologies must be characterized for on chip variations, have robust simulation models and be supported by specific design flows in order to be viable in high volume production. This project addresses such challenges in the design and design automation of resonant rotary clocking technology for high-volume IC production.With improved nanoscale design characterization and design automation methodologies, rotary clocking technology can be seamlessly integrated within the mainstream VLSI IC design flow. The broader impacts of the proposed research are in revolutionizing the clock synchronization methodology of digital VLSI synchronous circuits for low-power, multi-GHz operation and providing its sustainability over semiconductor technology scaling. Proposed low-power, multi-GHz high-performance clocking operation will have a major impact on all microelectronic systems, from field-deployable low power sensors to the world's fastest supercomputers. The research accomplishments will be disseminated through a wiki site and a book. Another important educational impact is on integrating nano-computing and technology concepts into computer engineering curriculum. A workshop on computing is planned for high school students as an integral part of the ongoing outreach projects in urban Philadelphia.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
CNS Core: Small: Wireless Interconnect Networks on Multi-Die Systems
-
批准号:2008629
-
项目类别:Standard Grant
-
资助金额:$46.5万
-
财政年份:2020
-
负责人:Baris Taskin
-
依托单位:
SHF: Small: Circuits and Systems with Charge Recovery
-
批准号:1816857
-
项目类别:Standard Grant
-
资助金额:$39.04万
-
财政年份:2018
-
负责人:Baris Taskin
-
依托单位:
CSR: Medium: Collaborative Research: Architecture and System Support for Power-Agile Computing
-
批准号:1409014
-
项目类别:Continuing Grant
-
资助金额:$27.88万
-
财政年份:2014
-
负责人:Baris Taskin
-
依托单位:
II-NEW: Testbed for High Performance Interconnects
-
批准号:1305350
-
项目类别:Standard Grant
-
资助金额:$70.0万
-
财政年份:2013
-
负责人:Baris Taskin
-
依托单位:
Hybrid Wireless Network-on-Chips
-
批准号:1232164
-
项目类别:Standard Grant
-
资助金额:$40.0万
-
财政年份:2012
-
负责人:Baris Taskin
-
依托单位:
REU Site: Computing for Power and Energy: The Old, The New and The Renewable
-
批准号:1004936
-
项目类别:Standard Grant
-
资助金额:$36.0万
-
财政年份:2010
-
负责人:Baris Taskin
-
依托单位:
海外基金