DEVELOPMENT OF COMPLIANT FREE-STANDING STRUCTURES FOR SUB 32-nm MULTI-CORE ICs
DEVELOPMENT OF COMPLIANT FREE-STANDING STRUCTURES FOR SUB 32-nm MULTI-CORE ICs
批准号:
0901679
负责人:
Suresh Sitaraman
金额:
$35.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-15 至 2012-08-31
中文摘要
本研究的目的是为下一代微电子系统设计、制造、组装、表征和测试创新的兼容、独立、并行路径、片外互连。所提出的互连将是晶圆级的,可扩展的,具有成本效益的,环保的,可修复的。该方法采用异构架构,结合柱状和平行路径兼容的互连,将通过顺序光刻和电镀工艺制造。通过建立电学和热力学仿真模型,优化互连设计。提出的兼容互连代表了芯片到衬底互连技术的范式转变,并提出了一种创新的方法来满足2016年及以后的半导体封装要求。将材料、机械、电气和热特性的基本原理与互连的制造、组装和测试的实际方面相结合,该计划提出的这种高风险的影响深远的方法超出了当前电子工业的重点,因此适合大学研究。通过小型化,该项目将在高速计算、医疗电子设备和用于健康监测和药物输送的植入体内的传感器、集成数字射频光电系统、无线和便携式电子设备以及用于情报收集和生物/化学传感的智能“飞行”电子设备和传感器等领域产生独特的影响。因此,通过影响计算机、通信、消费和医疗微系统,这项研究将为整个社会提供广泛的利益。研究成果将纳入课堂教学,并在期刊和会议上发表。通过学生实习和一对一的指导,各种各样的学生将被激励去追求工程教育。
英文摘要
The objective of this research is to design, fabricate, assemble, characterize, and test innovative compliant, free-standing, parallel-path, off-chip interconnects for next-generation microelectronic systems. The proposed interconnects will be wafer-level, scalable, cost-effective, environmentally-friendly, and reworkable. The approach is to employ a heterogeneous architecture that combines both column and parallel-path compliant interconnects that will be fabricated through sequential lithography and plating processes. By developing electrical and thermo-mechanical simulation models, the interconnect design will be optimized. The proposed compliant interconnects represent a paradigm shift in chip-to-substrate interconnect technology and present an innovative approach to meet the semiconductor packaging requirements for the year 2016 and beyond. Combining the fundamental principles related to material, mechanical, electrical, and thermal characteristics with practical aspects of fabrication, assembly, and testing of interconnects, this high-risk far-reaching approach proposed in this program is beyond the current focus of the electronics industry, and thus lends itself to university-based research. Through miniaturization, this program will have a unique impact in areas such as high-speed computing, medical electronics and sensors implanted in the body for health monitoring and drug delivery, integrated digital-RF-opto systems, wireless and portable electronics, and smart "fly" electronics and sensors used for intelligence gathering and bio/chemical sensing. Thus, by impacting computer, communications, consumer, and medical microsystems, this research will provide extensive benefits to the society at large. The research findings will be integrated into classroom instruction and published in journals and conferences. Through student internships and one-to-one mentoring, a diverse mix of students will be motivated to pursue engineering education.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
Non-Contact Experimental Technique to Characterize Interfacial Crack Propagation in Nano-Scale and Micro-Scale Thin Films
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批准号:0800037
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项目类别:Standard Grant
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资助金额:$25.0万
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财政年份:2008
-
负责人:Suresh Sitaraman
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依托单位:
Fixtureless Stress-Engineered Test Methods for the Measurement of Interfacial Fracture Toughness for Micro- and Nano-scale Thin-film Interfaces
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批准号:0510211
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项目类别:Standard Grant
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资助金额:$19.0万
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财政年份:2005
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负责人:Suresh Sitaraman
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依托单位:
SGER: Innovative Off-Chip Interconnects for 45-nm and sub-45-nm Node ICs
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批准号:0539023
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项目类别:Standard Grant
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资助金额:$0.0万
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财政年份:2005
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负责人:Suresh Sitaraman
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依托单位:
CAREER: Implantable Medical Devices: A Process-Modeling Approach to High Reliability Miniaturization
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批准号:9702285
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项目类别:Continuing Grant
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资助金额:$28.5万
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财政年份:1997
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负责人:Suresh Sitaraman
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依托单位:
海外基金