SGER: Innovative Off-Chip Interconnects for 45-nm and sub-45-nm Node ICs

该方案的目标是设计、制造、组装和测试创新的、高风险和高回报的芯片到基板互连结构，用于45 nm和亚45 nm节点IC。为了实现这一提议的目标，他们将使用类似LIGA的工艺来制造符合要求的互连，该工艺包括顺序电镀和光刻。PI将设计互连，以优化定向机械柔度、电阻、电感、电容、芯片和基板之间的不连续性、焦耳加热引起的最小温升以及抗疲劳故障的可靠性。PI将拥有合适的原型测试车辆来测试他建议的许多参数。这项建议支持了IC设计和制造中在尺寸、性能、成本和可靠性方面的主要挑战之一。这项提议代表了芯片到基板互连技术的根本范式转变，并提出了一种创新的方法，以满足2013年及以后的半导体封装。更广泛的影响：这项提议将使未来的半导体行业在发展创新技术方面受益，并可能产生重大的经济影响。这将有助于对研究生进行这项技术的培训。如果这项技术成功，那么它不仅将有助于大规模设备应用，而且将有助于系统封装的开发，这需要仔细和低成本的互连。

The objective of this proposal is to design, fabricate, assemble, and test innovative, high risk and high payoff compliant chip to substrate interconnect structures for the 45 nm and sub-45nm node ICs. To accomplish the goals of this proposal the will fabricate the compliant interconnects using LIGA-like process consisting of sequential plating and photolithography. The PI will design the interconnects to optimize the directional mechanical compliance, electrical resistance, inductance, capacitance, discontinuity between the chip and substrate, minimum temperature increase due to joule heating, and reliability against fatigue failure. The PI will have appropriate prototype test vehicles to test many of his suggested parametersThis proposal supports one of the major challenges in the IC design and fabrication in terms of size, performance, cost, and reliability. This proposal represents fundamental paradigm shift in chip-to-substrate interconnect technology and presents an innovative approach to meet the semiconductor packaging for 2013 and beyond. The broader impact: This proposal will benefit the semiconductor industry of the future in the development of novel innovative technology and could have significant economic impact. It will help train the graduate students in this technology. If this technology is successful, then it will not only help large-scale device applications but in the development of system in a package, which requires careful and cost effective interconnects.