Reliable Backend Integrated Hybrid Photonic-Electronic Network-on-Chip
Reliable Backend Integrated Hybrid Photonic-Electronic Network-on-Chip
批准号:
0903448
负责人:
Paul Ampadu
金额:
$53.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-01 至 2013-08-31
中文摘要
本研究的目的是为高性能多核芯片创造一种可靠的光电混合片上网络。这是通过使用电子分组交换网络配置和监控的硅兼容纳米光子光网络的后端集成实现的。智能优点:金属互连已经成为满足芯片多处理器中可靠性、性能和能量限制的关键瓶颈。硅纳米光子学提供了一种引人注目的替代方案,因为它固有的大带宽、低损耗、低能耗和与CMOS兼容。本研究通过(1)研究非晶硅纳米光子器件的CMOS兼容制造以获得最大的后端灵活性;(2)检查这些光电子片上网络的可扩展的体系结构、拓扑和布线机制;(3)探索用于可靠的高能效多核通信的差错控制方法;(4)开发向光子网络提供光的强大的低抖动锁模量子点激光器。广泛影响:光子-电子混合片上网络的成功演示将加速实现可靠的高能效数据中心和高性能计算系统,用于多种社会应用。研究和教育的结合建立在私人投资机构自身的社区参与和参与大学提供的优秀校园资源的基础上,以(1)通过由私人投资机构开发的联合课程和计划中的研讨会,培训下一代学者,使学生参与者能够与专家互动;(2)积极招募和指导合格的代表性不足的学生;(3)通过动手实验室活动鼓励K-12小组的参与;(4)通过国际合作扩大宣传范围。
英文摘要
The objective of this research is to create a reliable hybrid photonic-electronic network-on-chip for high performance multicore chips. This is achieved through backend integration of a silicon-compatible nanophotonic optical network configured and monitored using an electronic packet-switched network.Intellectual Merit: Metal interconnects have emerged as the critical bottleneck in meeting reliability, performance and energy constraints in chip multiprocessors. Silicon nanophotonics offers a compelling alternative, because of its inherently large bandwidth, low loss, low energy consumption and CMOS compatibility. This research addresses barriers challenging the efficient and cost-effective integration of on-chip photonic networks by (1) investigating CMOS compatible fabrication of amorphous silicon nanophotonic components for maximum backend flexibility; (2) examining scalable architectures, topologies and routing mechanisms for these photonic-electronic on-chip networks; (3) exploring error control methods for reliable energy-efficient multicore communication; (4) developing robust low-jitter mode-locked quantum-dot lasers that supply light to the photonic network.Broader Impact: Successful demonstration of the hybrid photonic-electronic network-on-chip will accelerate realization of reliable energy efficient data-centers and high performance computational systems for a multitude of societal applications. Integration of research and education builds on the PIs' own community involvement and excellent campus-wide resources offered by the participating universities to (1) train the next generation of scholars through a joint course to be developed by the PIs and planned workshops that enable student participants to interact with experts; (2) actively recruit and mentor qualified underrepresented students; (3) inspire participation of K-12 groups through hands-on laboratory activities; (4) extend outreach through international collaborations.
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会议论文
SaTC: CORE: Small: Finding and Mitigating Side-channel Leakage in Embedded Architectures
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批准号:1931639
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项目类别:Standard Grant
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资助金额:$50.0万
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财政年份:2019
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负责人:Paul Ampadu
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依托单位:
CAREER: Towards Reliable Hybrid CMOS/Nanoelectronics On-Chip Interconnection Networks
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批准号:0954999
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资助金额:$40.0万
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财政年份:2010
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负责人:Paul Ampadu
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依托单位:
Dual-Layer Cooperative Error Control for Reliable Nanoscale On-Chip Interconnection Networks
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批准号:0925993
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项目类别:Standard Grant
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资助金额:$29.01万
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财政年份:2009
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负责人:Paul Ampadu
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依托单位:
SGER: Investigating the Turbo Principle for Reliable Energy-Efficient Networks-on-Chip
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批准号:0733450
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项目类别:Standard Grant
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资助金额:$0.0万
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财政年份:2007
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负责人:Paul Ampadu
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依托单位:
海外基金