System-level Design of Streaming Applications on Domain Specific Multi-core Processors

该奖项是根据2009年《美国复苏和再投资法案》(Public Law 111-5)资助的。领域特定多核处理器(DSMP)旨在开发高性能的嵌入式系统应用(图像/信号处理、网络、图形、医疗仪器等)。数字信号处理器结合了多项架构创新，包括对称多处理、块多线程、硬件加速器、暂存存储器以及对处理器间通信的支持。然而，缺乏应用程序开发工具，需要设计者在线程和处理器之间手动划分功能，并确定存储元件上的数据映射。这种低层次的编程方法在最好的情况下会增加设计时间，在最坏的情况下会导致低质量的设计。此外，随着每一代连续处理器的功率密度不断增加，预计最终在DSMP上的性能优化将不得不考虑功率和热限制。该提案旨在解决两个研究问题。首先是在数字信号处理器上进行编程的系统级设计技术的发展。该技术将以流应用描述和目标处理器特征作为输入，并以最大化性能为目标自动生成应用在DSMP上的映射。第二项任务是开发DSMPS的功率和热感知设计技术。功率和热感知设计技术将在各自的峰值功率和温度限制下，在DSMP架构上执行自动化的系统级应用程序映射。由于数字信号处理器的体系结构是针对嵌入式系统应用的，因此对数字信号处理器的研究将对人机交互的诸多接口产生影响。教育活动将包括培训研究生，传播研究成果，并将研究成果纳入本科生/研究生课程。

"This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."Domain specific multi-core processors (DSMPs) are aimed at high performance embedded system applications (image/signal processing, networking, graphics, medical instrumentation, and so on). DSMPs incorporate several architectural innovations including symmetric multi-processing, block multi-threading, hardware accelerators, scratch-pad memories and support for inter-processor communication. However, there is a lack of application development tools which requires the designer to manually divide the functionality among threads and processors, and determine the data mapping on the memory elements. This low level approach to programming leads to increased design time in the best case, and poor quality designs in the worst case. Further, with increasing power densities in each successive generation of processors, it is expected that eventually performance optimization on DSMPs would have to consider power and thermal constraints. The proposal aims to address two research issues. First is the development of system-level design techniques for programming on DSMPs. The techniques will take a streaming application description and target processor features as inputs, and automatically generate a mapping of the application on the DSMP with an objective of maximizing the performance. The second task focuses on development of power and thermal-aware design techniques for DSMPs. The power and thermal-aware design techniques will perform automated system-level application mapping on DSMP architectures under respective peak power and temperature constraints. As DSMP architectures are aimed at embedded system applications, the research will have an impact on many interfaces of human-computer interaction. Education activities will include training of graduate students, dissemination of research outcomes, and incorporation of the results in undergraduate/graduate coursework.