Collaborative Research: II-NEW: Prototyping Platform to Enable Power-Centric Multicore Research

从最小的手持设备到最大的数据中心，在整个计算范围内，功耗对设计施加了很大的限制。新技术节点提供了显著的尺寸减小优势，但在功率和工艺可变性领域引入了重大挑战。这些新的技术节点在研究界常用的一阶模型中引入了关注点。晶体管级和门级模拟器可以提供更高的精度，但太慢，无法模拟运行实际程序的多核处理器。从根本上说，验证以权力为中心的新思想受到我们预测未来和模拟大规模影响或相对不太了解的现象的能力的限制。制造原型可以弥补这一差距，但基于原型的架构研究需要相当多的复杂基础设施，这对于学术研究人员来说相对较少。该项目提出了一个完整的原型平台，这将大大降低基于原型的以功率为中心的多核架构研究所需的成本和工作量。

Power consumption imposes significant design constraints across the entire spectrum of computing, from the smallest handheld device to the largest data center. New technology nodes provide significant size reduction advantages, but introduce significant challenges in the power and process variability domain. These new technology nodes introduce concerns in the available first-order models commonly used by the research community. Transistor-level and gate-level simulators can offer higher accuracy, but are too slow to model multicore processors running real programs.Fundamentally, validating novel power-centric ideas is limited by our ability to anticipate the future and to model large-scale effects or relatively poorly understood phenomenon. Fabricating prototypes can bridge the gap, but prototype-based architecture research requires a considerable amount of complex infrastructure making it relatively rare for academic researchers. This projects proposes a complete prototyping platform, that will greatly reduce the cost and effort required for prototype-based research into power-centric multicore architectures.