CAREER: Explicit Loop Architectures for Efficiently Exploiting Instruction- and Data-Level Parallelism

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Systems across the computing spectrum, from cellphones to supercomputers, are increasingly using a heterogeneous mix of general-purpose multicores augmented with programmable graphics processing units (GPUs). General-purpose multicores are easier to program but often less energy and area efficient, while GPUs are harder to program but more efficient on specific applications. Unfortunately, the two kinds of processors have radically different programming methodologies, instruction sets, microarchitectures, and VLSI implementations, and this heterogeneity significantly increases complexity at all levels of the computing stack. The tension between programmability, efficiency, and complexity is one of the key research challenges in computer engineering today. Overcoming this challenge will help ensure the continued increase in computational capability which has enabled tremendous advances in all corners of society.While there have been some modest steps towards tighter integration between general-purpose multicores and GPUs, this project is developing a truly convergent architecture that elegantly unifies these two types of processors. At the heart of the project is a new explicit loop (XL) architectural design pattern that is based on the concept of explicitly encoding and executing a loop iteration space. The project is using a vertically integrated approach to investigate: (1) XL programming frameworks, compilers, and runtimes; (2) XL instruction sets that provide an effective software/hardware interface for expressing explicit loops; (3) XL microarchitectures that are either optimized for instruction-level parallelism (ILP) or for data-level parallelism (DLP), as well as hybrid microarchitectures that can dynamically reconfigure the same underlying hardware resources to be either ILP or DLP focused; and (4) XL VLSI implementations that will enable accurate design-space exploration of performance, area, and energy implications.This project can broadly impact the field of computer architecture by offering a novel approach for designing future computer systems that is able to improve programmability and efficiency while reducing both software and hardware complexity. The project also includes an ambitious educational outreach plan to increase high-school-student participation and undergraduate-student retention in computer engineering.