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Low energy magnetic domain wall logic

Low energy magnetic domain wall logic
低能磁畴壁逻辑
批准号:
1101798
负责人:
Marc Baldo
金额:
$31.94万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2011
资助国家:
美国
项目状态:
已结题
起止时间:
2011-06-01 至 2014-05-31

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中文摘要
翻译
散热是现代电子产品面临的最严重的问题,限制了微处理器的时钟频率和芯片性能。这项拟议的工作开发了一种静态功率损耗为零、预计动态功率延迟乘积低于当代数字逻辑的磁逻辑器件。低功率操作是通过在非常低的电源电压下操作实现的,这既降低了器件切换时的动态功率,也降低了互连中的电路范围的损耗。这些好处是在不增加关闭状态的情况下获得的。漏电流。该器件依赖于两种经过验证的技术的集成,即用于存储元件的窄软铁磁线中的电流感应磁化磁壁传播,以及用于输出元件的磁性隧道结。这一建议的智力价值在于了解技术中的扩展限制,并解决系统级问题,如扇出、时钟和电路架构。我们将从实验和计算两个方面研究磁化壁传播与导线尺寸的函数关系,以了解反向行为与电流脉冲幅度和宽度以及导线的几何和材料参数的函数关系,从而检验定标极限。将开发电路架构和时钟方案,以实现多个设备的集成,从而使一个设备可以驱动一个或多个其他设备,从而利用设备的可编程性和非易失性来执行复杂的逻辑操作。该项目的结果不仅将展示实现逻辑的新战略,还将开发可应用于其他非传统设备的工具和体系结构。该提议的更广泛影响包括在高度跨学科的材料科学和电气工程领域培养一名研究生和大约两到四名本科生。除了人员培训外,这一项目的概念和结果将被纳入由个人投资促进机构教授的课程,这些课程将通过麻省理工学院开放式课程计划向公众开放,通过暑期体验向高中教师提供,并通过面向研究生的关于磁性隧道结和自旋传输的教科书和相关教学模块进行。课程发展的目标是以研究生和本科生都能理解的方式总结后硅器件的关键器件物理。
英文摘要
Heat dissipation is the most serious problem confronting modern electronics, and limits the clock rates and chip performance of microprocessors. The proposed work develops a magnetic logic device with zero static power losses and a projected dynamic power-delay product below that of contemporary digital logic. Low power operation is enabled by operating at a very low supply voltage, which reduces both the dynamic power when the devices are switched and circuit-wide dissipation in the interconnects. These benefits are obtained without increasing the ?off state? leakage current. The device relies on the integration of two proven technologies, current-induced domain wall propagation in a narrow soft ferromagnetic wire for the storage element, and a magnetic tunnel junction for the output element. The intellectual merit of this proposal is to understand the scaling limits in the technology, and to solve system-level issues such as fanout, clocking and circuit architecture. The scaling limits will be examined by studying domain wall propagation as a function of wire dimensions, both experimentally and computationally, to understand the reversal behavior as a function of current pulse amplitude and width and the geometrical and materials parameters of the wire. Circuit architecture and clocking schemes will be developed to enable integration of multiple devices, so that one device can drive one or more other devices, enabling complex logic operations to be performed, making use of the programmability and non-volatility of the device. The results from the project will not only demonstrate a new strategy for realizing logic, but will develop tools and architecture that can be applied to other nontraditional devices.The broader impacts of the proposal include the training of a graduate student and approximately two to four undergraduate students in a highly interdisciplinary materials science and electrical engineering field. In addition to training of personnel, the concepts and findings of this project will be incorporated into classes taught by the PIs, which will be available to the public through the MIT OpenCourseWare initiative, to high school teachers through summer experiences, and through a textbook and an associated teaching module for graduate students on magnetic tunnel junctions and spin transport. The goal of class development is to summarize the key device physics of post-silicon devices in a manner that is accessible to both graduate and undergraduate students.
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E2CDA: Type II: Memory, Logic, and Logic in Memory Using Three Terminal Magnetic Tunnel Junctions
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